Adaptive PLL Loop Filter Reset for Lower Power and Stable Lock
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Solution Overview
Problem
Conventional phase lock loops (PLLs) consume excessive power due to inefficient reset circuits, particularly in sample-reset loop filters (SR-LFs), which waste power regardless of phase error or frequency, leading to instability and higher lock times.
Innovation Solution
Implementing a power gating pulse circuit that generates adaptive reset control signals with significantly shorter pulse widths based on phase error and switch control signals, using active element voltage dividers instead of resistors to reduce reset duration and current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional reset circuits are used in sample-reset loop filters, then capacitors are reset to avoid memory effect and maintain PLL stability, but power consumption increases significantly and circuit complexity increases
Solution Approach 1:
The reset circuit dynamically adjusts the reset signal duration based on the detected phase error magnitude. When phase error is large, the reset signal is applied for a longer duration to fully discharge the capacitor and eliminate memory effect. When phase error is small, the reset signal duration is reduced or eliminated, significantly reducing power consumption while maintaining PLL stability.
Solution Approach 2:
The invention changes the parameter of reset signal duration from a fixed value to a variable value that depends on the phase error condition. This parameter change allows the circuit to adapt between two operational modes: full reset mode for large phase errors and reduced/no reset mode for small phase errors, optimizing the trade-off between stability and power consumption.
2Reliability
If conventional reset circuits with precision resistors are used, then capacitor reset function is achieved, but manufacturing cost increases and circuit footprint increases
Solution Approach 1:
The invention extracts and eliminates the precision resistor component from the reset circuit. By using an operational amplifier-based active circuit instead of a passive resistor, the design removes the need for expensive precision resistors while maintaining the capacitor reset function. This substitution significantly reduces manufacturing costs and simplifies the bill of materials.
Solution Approach 2:
The invention replaces the passive electrical component (resistor) with an active electronic circuit (operational amplifier-based reset circuit). This substitution allows for more flexible control of the reset function through electronic signaling rather than relying on fixed passive components, enabling dynamic adjustment and reducing dependency on precision passive components.
3Reliability
If conventional reset circuits are used, then capacitor reset is achieved, but lock time increases due to excessive power consumption and circuit overhead
Solution Approach 1:
The reset circuit dynamically controls the reset signal duration based on phase error detection. By applying reset signals only when necessary (during large phase errors) and reducing or eliminating reset signals during small phase errors, the circuit minimizes the time capacitors spend in reset states, thereby reducing overall lock time while maintaining reset capability when needed.
Solution Approach 2:
The reset function is applied periodically and conditionally based on phase error detection rather than continuously. The circuit monitors phase error and applies reset action only during specific conditions (large phase errors), creating a conditional periodic reset pattern that reduces unnecessary reset operations and accelerates lock acquisition.
Data Source
AI summary
An apparatus has a phase lock loop with an adaptive loop filter that has a reset circuit controlled by a power gating pulse circuit.