Adaptive Polling for QLC Memory Systems

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Solution Overview

Problem

NAND memory devices, particularly those using quad-level cells (QLCs), face inefficiencies in polling operations due to temperature sensitivity, leading to increased latency and power consumption, as they are more sensitive to temperature fluctuations compared to triple-level cells (TLCs) and other memory types.

Innovation Solution

The memory system adjusts polling parameters based on temperature measurements, decreasing polling delay and increasing frequency as temperature rises, and vice versa, to optimize resource usage and align polling speed with the memory device's performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If polling operation is performed frequently to monitor memory status, then response time is improved, but power consumption increases

Engineering Contradiction:
Improvepolling latencyVSAvoidpower consumption
Core Design Contradiction:
Loss of timeVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic polling adjustment where the polling frequency is not fixed but adapts based on temperature conditions. The system transitions from static polling to dynamic polling by modifying the polling period according to real-time temperature measurements, allowing the system to optimize between response time and power consumption based on environmental conditions

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the polling parameter (polling frequency/period) based on temperature conditions. When temperature increases, the polling period is extended (frequency reduced), and when temperature decreases, the polling period is shortened (frequency increased). This parameter adaptation resolves the contradiction by adjusting the balance between monitoring responsiveness and energy consumption according to thermal conditions

Inventive Principle:
Principle #35Parameter changes

2Speed

If polling frequency is increased to reduce latency, then access speed is improved, but device complexity increases

Engineering Contradiction:
Improveaccess speedVSAvoidpolling control complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The system manages complexity by changing a single key parameter (polling period) rather than implementing complex multi-level polling hierarchies or multiple monitoring mechanisms. This simple parameter adjustment achieves speed optimization without introducing significant control complexity

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses temperature feedback to automatically adjust polling frequency. The temperature sensing mechanism provides continuous feedback about environmental conditions, which then triggers appropriate polling frequency adjustments. This feedback loop simplifies control complexity by using a straightforward sensor-actuator relationship rather than complex decision logic

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20240345743A1Adaptive polling for higher density storage
Publication Date: 2024.10.17 MICRON TECHNOLOGY INC
  • US20240345743A1 patent drawing
  • US20240345743A1 patent drawing
  • US20240345743A1 patent drawing

AI summary

Methods, systems, and devices for adaptive polling for higher density storage are described. A controller of a memory system may identify a temperature of the memory device and select one or more polling parameters that are associated with identifying a status of the memory device based on a temperature of a memory system. In some cases, the controller may perform a polling operation according to the one or more polling parameters based on selecting the one or more polling parameters.