Adaptive POR Generator for Variable Supply Ramp Timing

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Solution Overview

Problem

Programmable logic devices (PLDs) face challenges in ensuring reliable power-on-reset signals during varying supply voltage ramp rates, which can lead to malfunction or damage, especially when different components turn on at different times, requiring adaptive solutions to manage power supply slew rates effectively.

Innovation Solution

An adaptive power-on-reset (POR) signal generator that measures the ramp rate of the supply voltage and generates a POR signal coincident with the supply voltage reaching its nominal operating voltage, using a counter to determine the appropriate delay based on the ramp time between selected threshold voltages, allowing for flexible operation across different power supply conditions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a fixed delay is used for power-on-reset signal generation, then the device complexity is reduced, but the reliability deteriorates due to inability to adapt to varying supply voltage ramp rates

Engineering Contradiction:
Improvepower-on-reset signal reliabilityVSAvoidPOR generator complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The POR signal generator uses a variable delay mechanism that adapts to different supply voltage ramp rates. The delay is determined by measuring the actual ramp rate of the supply voltage and dynamically adjusting the POR signal assertion timing accordingly, rather than using a fixed delay. This dynamic adaptation ensures reliable operation across varying power supply conditions while managing device complexity through efficient measurement and control logic.

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If components are allowed to turn on at different times to match their specific requirements, then the adaptability is improved, but the device complexity increases due to need for coordinated control

Engineering Contradiction:
Improvepower-on sequence adaptabilityVSAvoidpower management complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The system measures the actual supply voltage ramp rate and uses this feedback information to determine the appropriate timing for asserting the POR signal. This feedback-based approach allows the system to adapt to different power supply conditions and component requirements without requiring complex pre-programmed sequences or multiple independent control circuits. The measurement result directly controls the delay timing, enabling coordinated power-on of components based on actual voltage conditions.

Inventive Principle:
Principle #23Feedback

3Productivity

If the POR signal is generated too early, then the productivity is improved by faster system startup, but the reliability deteriorates due to premature turn-on of circuitry

Engineering Contradiction:
Improvesystem startup speedVSAvoidcircuitry protection
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system performs a preliminary measurement of the supply voltage ramp rate before determining the POR signal timing. By measuring the actual ramp characteristics in advance, the system can calculate the optimal delay period needed to ensure the voltage reaches safe levels before circuitry is activated. This preliminary measurement approach enables the system to minimize startup time while ensuring reliable protection against premature turn-on, as the delay is precisely tailored to the measured voltage conditions.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11907033B2Adaptive power-on-reset generator systems and methods for programmable logic devices
Publication Date: 2024.02.20 LATTICE SEMICON CORP
  • US11907033B2 patent drawing
  • US11907033B2 patent drawing
  • US11907033B2 patent drawing

AI summary

Systems and methods for providing adaptive power on reset (POR) signals for use with programmable logic devices (PLDs) and/or other semiconductor devices are disclosed. An example adaptive POR signal generator includes a logic device configured to detect a first supply voltage ramp traversal across a first threshold ramp voltage, detect a second supply voltage ramp traversal across a second threshold ramp voltage, and generate a POR signal based, at least in part, on a nominal operating voltage associated with the power supply and/or the supply voltage and/or on a ramp time associated with the first and second supply voltage ramp traversals. The second threshold ramp voltage is higher than the first threshold ramp voltage and the first and second threshold ramp voltages are lower than the nominal operating voltage.