Adaptive Power Control for Address Map Memory Devices
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Solution Overview
Problem
Conventional memory systems face inefficiencies in power management, particularly when using DRAM devices to store logical-to-physical address mapping information, as continuous power consumption is high and reducing the number of DRAM devices lowers performance.
Innovation Solution
Implementing dynamically powered volatile memory devices that adaptively adjust power settings based on available power and performance modes, allowing incremental powering and depowering to optimize power usage and performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If DRAM devices are used to store logical-to-physical address mapping information, then access speed is improved, but power consumption increases
Solution Approach 1:
The patent implements dynamic power management for DRAM devices by transitioning between active and self-refresh modes based on access patterns. The system monitors access frequency and dynamically adjusts the operational state of DRAM devices, keeping frequently accessed mapping information in active mode for fast access while moving less frequently accessed data to self-refresh mode to reduce power consumption.
Solution Approach 2:
The patent employs periodic self-refresh operations for DRAM devices that are not actively being accessed. Instead of continuous powering, the system performs periodic refresh cycles at lower power levels, maintaining data integrity while significantly reducing power consumption during periods of low activity. This periodic action allows the system to balance between maintaining fast access capability and conserving energy.
2Use of energy by moving object
If the number of DRAM devices is reduced to lower power consumption, then power usage decreases, but performance deteriorates
Solution Approach 1:
The system dynamically adjusts the number of actively powered DRAM devices based on workload demands. During high-performance periods, more DRAM devices are activated to handle increased mapping requests. During low-activity periods, fewer devices remain active while others enter self-refresh mode, optimizing the balance between performance and power consumption in real-time.
Solution Approach 2:
The patent changes operational parameters of DRAM devices by transitioning between different power modes (active, idle, self-refresh) and adjusting refresh rates based on system conditions. This parameter adjustment allows the system to maintain adequate performance while optimizing power usage according to actual workload requirements.
Data Source
AI summary
An apparatus includes a storage resource to store data. The data can be accessible by a host computer system. The apparatus includes a set of dynamically powered volatile memory devices that are configured to store mapping information. The mapping information maps logical addresses of received access requests to corresponding physical addresses of the storage resource to which the access requests pertain. In accordance with received mode setting information, the controller logic adaptively controls power settings of the volatile memory devices storing the mapping information. If an abundance of power such as 120 VAC power is available, more of volatile memory devices can be powered to store a greater portion of the mapping information. If only battery power is available, fewer than all of the volatile memory devices can be powered to store a smaller portion of the mapping information.