Adaptive Power Control for ML Accelerators
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Solution Overview
Problem
Machine learning computing resources face high power consumption due to instantaneous current and power spikes during arithmetic operations, which can shorten hardware lifespan and are not efficiently managed by existing power supply systems lacking contextual awareness of computation intensity and power demands.
Innovation Solution
A power control system with a machine learning power controller that uses on-device sensors and feedback mechanisms to dynamically adjust power delivery parameters, such as clock speed and voltage, based on real-time monitoring of hardware and environmental parameters, allowing for proactive power management and reduced power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If hardware accelerators perform large numbers of computations in a relatively short amount of time, then computation speed and productivity are improved, but instantaneous current and power spikes occur that negatively impact hardware lifespan
Solution Approach 1:
The power supply system dynamically adjusts its output characteristics (voltage, current) in real-time based on the computational workload of the hardware accelerator. The controller monitors computation intensity and modifies power delivery accordingly, transitioning from static fixed-rail power supply to dynamic adaptive power supply that matches actual computational demands.
Solution Approach 2:
The system changes power supply parameters (voltage levels, current limits, power output) based on the computational phase and intensity. During high-computation phases, higher power is delivered; during low-computation or idle phases, power parameters are reduced. This prevents sustained high-power states that cause hardware degradation while maintaining performance when needed.
2Device complexity
If power supply systems operate at fixed rail voltages to simplify design, then device complexity is reduced, but power consumption efficiency deteriorates due to inability to adapt to varying computation demands
Solution Approach 1:
The power supply system incorporates feedback mechanisms where the controller monitors computational workload from the hardware accelerator and adjusts power output accordingly. Sensors detect computation intensity metrics, and this information feeds back to the power supply controller which modifies voltage and current delivery in real-time, creating a closed-loop adaptive power management system.
Solution Approach 2:
The power supply system is designed to serve multiple computational phases and workload types with a single adaptive controller that can adjust its output characteristics. Rather than requiring separate fixed-voltage supplies for different operational modes, one universal adaptive power supply handles all computation intensities and phases, from idle to peak performance.
3Loss of energy
If existing power control approaches set portions of circuit into low-power mode, then power consumption is reduced, but all power rails continue to operate at nominal output voltage causing wasted power resources
Solution Approach 1:
The power supply system segments power delivery by individual rails or voltage domains, allowing independent control of each power rail's output voltage. Rather than treating the power supply as a monolithic fixed-voltage system, each power rail can be independently adjusted to match the actual power requirements of the circuits it supplies, enabling granular power management.
Solution Approach 2:
Different power rails or voltage domains are assigned different voltage levels based on the local computational needs of the circuits they power. Memory circuits receiving low-power signals receive reduced voltage, while active computation units receive appropriate voltage levels. This localized voltage adaptation prevents uniform over-powering of all circuits and enables targeted power optimization.
Data Source
AI summary
Described are context-aware low-power systems and methods that reduce power consumption in compute circuits such as commonly available machine learning hardware accelerators that carry out a large number of arithmetic operations when performing convolution operations and related computations. Various embodiments exploit the fact that power demand for a series of computation steps and many other functions a hardware accelerator performs is highly deterministic, thus, allowing for energy needs to be anticipated or even calculated to a certain degree. Accordingly, power supply output may be optimized according to actual energy needs of compute circuits. In certain embodiments this is accomplished by proactively and dynamically adjusting power-related parameters according to high-power and low-power operations to benefit a machine learning circuit and to avoid wasting valuable power resources, especially in embedded computing systems.