Adaptive Power Modeling for Chip Design Accuracy
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Solution Overview
Problem
Current chip design for smart handheld devices faces challenges in optimizing power consumption and overheating, requiring a comprehensive approach that considers architecture, software, hardware, and silicon intellectual property, with existing power consumption models lacking in accuracy and efficiency.
Innovation Solution
An adaptive learning power modeling method and system that samples network components to form a power consumption evaluation network, evaluates predictive power consumption, and adjusts the model based on actual consumption data to achieve a balance between accuracy and complexity, using techniques like LSTM, maxout units, and temporal convolution networks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If existing power consumption models are used, then power consumption can be estimated, but the accuracy and efficiency of the model is insufficient
Solution Approach 1:
The patent implements dynamic model selection by training multiple power consumption models with different complexities (e.g., different network depths, different feature extraction methods) and selecting the most appropriate model based on real-time evaluation metrics. This allows the system to adaptively balance between accuracy and complexity rather than using a fixed model structure.
Solution Approach 2:
The patent changes key parameters of the power consumption models including network depth, number of layers, feature extraction methods, and training data samples. By systematically varying these parameters and evaluating performance, the system identifies optimal parameter configurations that achieve high accuracy without excessive complexity.
2Productivity
If comprehensive power consumption optimization is pursued considering architecture, software, hardware, and silicon IP, then overall efficiency can be improved, but the design complexity increases
Solution Approach 1:
The patent segments the comprehensive power consumption optimization problem into distinct components: architectural level optimization, software level optimization, hardware level optimization, and silicon IP level optimization. Each component has its dedicated power consumption model and optimization strategies, allowing systematic handling of complex multi-level design considerations without overwhelming complexity.
Solution Approach 2:
The patent creates a universal power consumption modeling framework that can handle multiple levels of design (architecture, software, hardware, silicon IP) through a unified methodology. The same basic approach of model training, evaluation, and selection is applied across all levels, providing consistency and reducing overall design process complexity despite the comprehensive scope.
Data Source
AI summary
An adaptive learning power modeling method includes: sampling at least one of a plurality of network components to form a power consumption evaluation network according to at least one parameter within a parameter range; evaluating a predictive power consumption of a to-be-measured circuit by the power consumption evaluation network; training and evaluating an actual power consumption and the predictive power consumption of the to-be-measured circuit by the power consumption evaluation network to obtain an evaluation result; and performing training according to the evaluation result to determine whether to change the power consumption evaluation network.