Adaptive Pre-Read Management for Multi-Pass Memory Programming

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Solution Overview

Problem

Multi-pass programming in memory devices leads to increased errors due to cell-to-cell coupling and bit errors, necessitating excessive resource consumption for error correction, especially when external pre-reads are used, while internal pre-reads are insufficient for correcting errors above a given threshold.

Innovation Solution

Adaptive pre-read management that selectively performs internal or external pre-reads based on measured operating conditions and threshold settings to reduce resource consumption and improve efficiency and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If external pre-reads are used to correct bit errors in multi-pass programming, then error correction capability is improved, but resource consumption increases excessively

Engineering Contradiction:
Improveerror correction capabilityVSAvoidresource consumption
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system dynamically switches between internal pre-read mode and external pre-read mode based on real-time error detection. When bit errors are detected during multi-pass programming, the system activates external pre-reads only for those specific blocks that require correction, rather than continuously using external pre-reads for all operations. This dynamic adaptation reduces overall resource consumption while maintaining error correction capability where needed.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent applies different pre-read strategies to different memory blocks based on their error characteristics. Internal pre-reads are used for blocks with minor or no errors, while external pre-reads are applied selectively to blocks exceeding the error threshold. This localized approach ensures that heavy resource consumption is concentrated only where necessary, optimizing the balance between error correction and resource usage.

Inventive Principle:
Principle #3Local quality

2Device complexity

If internal pre-reads are used for error correction, then resource consumption is reduced, but error correction capability is insufficient for errors above a given threshold

Engineering Contradiction:
Improveresource consumptionVSAvoiderror correction capability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The error correction process is segmented into two distinct modes: internal pre-read mode for handling minor errors and external pre-read mode for correcting severe errors. The system first attempts internal pre-reads to correct bit errors, and only when errors exceed a predetermined threshold does it switch to external pre-reads. This segmentation allows the system to use lightweight internal pre-reads for most cases while reserving external pre-reads for critical error correction, optimizing both resource consumption and error correction capability.

Inventive Principle:
Principle #1Segmentation

3Manufacturing precision

If multi-pass programming is used to program memory devices, then programming precision is improved, but cell-to-cell coupling errors increase

Engineering Contradiction:
Improveprogramming precisionVSAvoidcell-to-cell coupling errors
Core Design Contradiction:
Manufacturing precisionVSObject-generated harmful factors

Solution Approach 1:

The system implements feedback mechanisms during multi-pass programming by continuously monitoring bit error rates and coupling errors. After each programming pass, the system performs pre-reads (internal or external) to detect errors introduced by cell-to-cell coupling. Based on this feedback, the system adjusts subsequent programming operations, applying external pre-reads and error correction only when necessary, thereby mitigating the harmful effects of coupling errors while maintaining programming precision.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20250285682A1Adaptive pre-read management in multi-pass programming
Publication Date: 2025.09.11 MICRON TECHNOLOGY INC
  • US20250285682A1 patent drawing
  • US20250285682A1 patent drawing
  • US20250285682A1 patent drawing

AI summary

Exemplary methods, apparatuses, and systems include an adaptive pre-read manager for controlling pre-reads of the memory device. The adaptive pre-read manager receives a first set of data bits for programming to memory. The adaptive pre-read manager performing a first pass of programming including a first subset of data bits from the set of data bits. The adaptive pre-read manager compares a set of threshold operating differences to a set of differences between multiple operating conditions during the first pass of programming and current operating conditions. The adaptive pre-read manager performs an internal pre-read of the programmed first subset of data bits. The adaptive pre-read manager performs a second pass of programming using the internal pre-read and a second subset of data bits from the first set of data bits.