Adaptive PTP Filtering for Packet Delay Variation Suppression

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Solution Overview

Problem

Packet delay variation in Precision Time Protocol (PTP) networks caused by inconsistent network traffic leads to instability in slave device clocks, as they are not accurately synchronized with primary reference clocks.

Innovation Solution

An integrated circuit with a microcontroller that receives phase offsets over time, determines a weight vector based on these offsets, and adjusts filter coefficients to implement adaptive filtering, reducing packet delay variation by synchronizing the slave device clock with both physical and IEEE 1588 clock layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If adaptive filtering with dynamic filter coefficients is implemented, then clock synchronization accuracy is improved, but device complexity increases

Engineering Contradiction:
Improveclock synchronization accuracyVSAvoiddevice complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent implements adaptive filtering where filter coefficients are dynamically adjusted based on packet delay variation metrics. The system transitions from static to dynamic filtering by continuously updating coefficients according to current network conditions, thereby improving synchronization accuracy while managing complexity through adaptive rather than purely static designs

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes filter parameters (coefficients) based on measured packet delay variation. By monitoring network conditions and adjusting filter coefficients accordingly, the system optimizes synchronization accuracy for varying network states without requiring completely different filter designs for each condition

Inventive Principle:
Principle #35Parameter changes

2Reliability

If filter coefficients are continuously adjusted based on packet delay variation, then noise inconsistency is reduced, but computational load increases

Engineering Contradiction:
Improvenoise consistencyVSAvoidcomputational load
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies filtering selectively based on measured packet delay variation thresholds. Rather than continuously adjusting filters at maximum intensity, the system applies partial filtering action only when packet delay variation exceeds acceptable levels, reducing unnecessary computational load while maintaining reliability when needed

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The system implements feedback by monitoring packet delay variation and using this information to adjust filter coefficients. This closed-loop approach ensures filtering is applied appropriately based on actual network conditions, avoiding excessive computational effort during stable periods while maintaining noise consistency during variable conditions

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11831405B2Adaptive filtering for precision time protocol with physical layer support
Publication Date: 2023.11.28 RENESAS ELECTRONICS AMERICA INC
  • US11831405B2 patent drawing
  • US11831405B2 patent drawing
  • US11831405B2 patent drawing

AI summary

Systems and methods for reducing phase delay variation impact are described. A microcontroller can receive a sequence of phase offsets determined by a slave device over time. The microcontroller can determine a weight vector based on a metric associated with the sequence of phase offsets. The microcontroller can adjust a set of filter coefficients based on the weight vector. The set of filter coefficients can be filter coefficients of a filter being implemented by the slave device to filter incoming packet data.