Adaptive Pulse Level Shifter for Bootstrap Current Reduction
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Solution Overview
Problem
Existing level shifters in high voltage switching applications waste bootstrap current due to fixed pulse widths that do not adapt to varying voltage, process, and temperature conditions, limiting their efficiency in battery-powered electronics.
Innovation Solution
The implementation of adaptive pulse generation in level shifter circuits, where pulse duration is controlled by feedback from the high voltage latch, ensuring pulses are only as long as needed to change the latch state, minimizing current draw from the bootstrap capacitor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If fixed pulse width is used in level shifter, then circuit operation is simple, but bootstrap current is wasted due to non-adaptive pulse duration
Solution Approach 1:
The patent implements feedback by monitoring the state of the high voltage latch circuit and using this information to control the duration of the pulse signal. The pulse generator receives feedback about whether the latch has successfully changed state, and terminates the pulse early if the state change is detected, thereby adapting pulse width to actual circuit conditions and minimizing bootstrap current consumption.
Solution Approach 2:
The patent transforms the static fixed pulse width into a dynamic adaptive pulse width. The pulse duration is no longer fixed but varies based on real-time monitoring of the latch circuit state. This dynamic adjustment allows the system to use the minimum necessary pulse duration under varying voltage, process, and temperature conditions, reducing energy loss while maintaining reliability.
2Use of energy by moving object
If adaptive pulse generation is implemented, then current draw from bootstrap capacitor is reduced, but circuit complexity increases
Solution Approach 1:
The level shifter circuit incorporates feedback mechanisms where the state of the high voltage latch is monitored and fed back to the pulse generation circuit. This feedback enables the system to detect when the latch state has changed and terminate the pulse signal accordingly, achieving adaptive pulse generation that minimizes current draw while managing complexity through targeted feedback paths.
Solution Approach 2:
The circuit employs self-service mechanisms where the latch circuit itself provides the feedback signal needed to control pulse termination. The latch state directly influences the pulse generator operation, creating a self-regulating system that adapts to conditions without requiring external control, thereby reducing overall system complexity while achieving energy efficiency.
3Reliability
If pulse width is extended to ensure latch state change, then reliability is improved, but energy consumption increases
Solution Approach 1:
The feedback mechanism continuously monitors whether the latch state change has occurred and provides real-time information to the pulse generator. This allows the system to maintain reliability by extending the pulse only as long as necessary to ensure successful state change, rather than using a conservative fixed pulse width that may be longer than needed in all conditions, thus optimizing the balance between reliability and energy consumption.
Solution Approach 2:
The system applies partial action by providing just enough pulse duration to achieve the desired latch state change under varying conditions. Rather than always applying a fixed excessive pulse width to guarantee reliability, the adaptive mechanism applies the minimum necessary pulse duration based on actual circuit conditions, reducing energy loss while maintaining sufficient reliability through condition-based adjustment.
Data Source
AI summary
A level shifter circuit includes a high voltage latch circuit, a low voltage latch circuit, a high state pulse generator, and a low state pulse generator. The high voltage latch circuit includes a non-inverting output terminal, an inverting output terminal, a high state trigger input terminal, and a low state trigger input terminal. The low voltage latch circuit includes a high state trigger input terminal and a low state trigger input terminal. The high state trigger input terminal is coupled to the inverting output terminal of the high voltage latch circuit. The low state trigger input terminal is coupled to the non-inverting output terminal of the high voltage latch circuit. The high state pulse generator is coupled to the high state trigger input terminal of the high voltage latch circuit. The low state pulse generator is coupled to the low state trigger input terminal of the high voltage latch circuit.


