Adaptive Program-Verify Targets for Wear-Affected Memory Distributions

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Conventional memory sub-systems fail to dynamically adjust program verify (PV) targets of initial and last programming distributions, leading to reduced endurance due to fixed guard bands that limit available margin for calibration, thus affecting reliability and longevity.

Innovation Solution

A program targeting (PT) operation adjusts PV targets using a set of rules based on difference error counts (Diff-EC) to balance bit error rates (BER) and equalize valley margins across logical page types, allowing for dynamic compensation for wear and maintaining optimal read level thresholds.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If fixed guard bands are used for initial and last programming distributions, then manufacturing simplicity is maintained, but memory component endurance deteriorates due to limited calibration margin

Engineering Contradiction:

Improveprogramming operation simplicityVSAvoidmemory component endurance

Core Design Contradiction:

Ease of manufactureVSDuration of action of moving object

Solution Approach 1:

The patent implements dynamic adjustment of PV targets for programming distributions adjacent to initial and last distributions. The system monitors wear effects and diff-EC metrics, then dynamically modifies PV targets to maintain optimal valley margins throughout the memory component's operational life, transforming static guard bands into adaptive protection mechanisms that extend endurance without complicating the manufacturing process

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent changes the PV target parameters for specific programming distributions (L1 and L7 in TLC, L2 and L14 in QLC) based on measured diff-EC values and wear indicators. By adjusting these parameters dynamically while keeping the overall programming structure intact, the system maintains manufacturing simplicity while significantly improving endurance through optimized calibration margins

Inventive Principle:

Principle #35Parameter changes

2Device complexity

If PV targets of initial and last programming distributions are fixed, then device complexity is reduced, but reliability deteriorates due to inability to compensate for wear effects

Engineering Contradiction:

Improvecontrol mechanism complexityVSAvoidmemory read reliability

Core Design Contradiction:

Device complexityVSReliability

Solution Approach 1:

The patent applies local quality by selectively adjusting PV targets only for programming distributions adjacent to the initial and last distributions (L1, L7 for TLC; L2, L14 for QLC), while leaving the PV targets for the initial and last distributions themselves fixed. This localized adjustment approach maintains overall system simplicity while improving reliability in the critical transition zones where wear effects manifest most strongly

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The patent implements feedback mechanisms that monitor diff-EC (difference in error counts) and wear indicators, then use this information to dynamically adjust PV targets for adjacent programming distributions. This closed-loop feedback system automatically compensates for wear effects and maintains optimal read reliability without requiring complex manual intervention or redesign

Inventive Principle:

Principle #23Feedback

3Reliability

If guard bands are increased to improve reliability, then read reliability improves, but available margin for calibration is reduced, worsening endurance

Engineering Contradiction:

Improveread level threshold reliabilityVSAvoidcalibration margin availability

Core Design Contradiction:

ReliabilityVSDuration of action of moving object

Solution Approach 1:

The patent dynamically adjusts PV targets for adjacent programming distributions based on real-time monitoring of diff-EC metrics and wear indicators. This dynamic adjustment allows the system to maintain reliable read operations by optimizing valley margins adaptively, ensuring that calibration margin is preserved and extended throughout the memory component's operational life rather than being statically reduced

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent performs preliminary adjustments to PV targets of adjacent programming distributions before wear critically impacts performance. By proactively modifying PV targets based on early wear indicators and diff-EC measurements, the system prevents margin exhaustion and extends calibration life without compromising read reliability

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS12424288B2Adjustment of program verify targets corresponding to a last programming distribution and a programming distribution adjacent to an initial programming distribution

Publication Date: 2025.09.23 MICRON TECHNOLOGY INC

AI summary

A processing device determines a plurality of computing error metrics that are indicative of operational characteristics between programming distributions within the memory device. The processing device performs a program targeting operation on a memory cell of the memory device to calibrate one or more program verify (PV) targets associated with the programming distributions. Performing the program targeting operation comprises the processing device selecting a rule from a predefined set of rules based on the plurality of computing error metrics, wherein the predefined set of rules corresponds to an adjusting of a PV target of a last programming distribution. In addition, the processing device adjusts, based on the selected rule, the one or more PV targets of a plurality of PV targets associated with the programming distributions, wherein the one or more PV targets correspond to one or more respective voltage values for programming memory cells of the memory device.