Adaptive Ramp Signal Modulator for Low-Distortion Duty Cycles

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Solution Overview

Problem

Existing pulse-width modulators, such as AD and 1SPW modulators, exhibit nonlinear transfer functions and significant distortion when driving power stages in audio amplifier systems, limiting their reliability and stability due to restricted duty-cycle operations.

Innovation Solution

An adaptive ramp generator is introduced to modulate input signals by adjusting the minimum level of a ramp signal within each clock cycle, ensuring the peak value matches the highest input signal amplitude and correcting for duty-cycle distortion, thereby maintaining a linear ramp profile and reducing distortion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If minimum and maximum duty cycle values are used to drive a power stage, then reliable operation is ensured, but the transfer function exhibits nonlinear regions resulting in distortions

Engineering Contradiction:
Improvepower stage operation reliabilityVSAvoidtransfer function linearity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent implements dynamic adjustment of the ramp signal's minimum level based on the input signal amplitude. The ramp generator continuously adapts the minimum level parameter to maintain optimal operating conditions across varying signal levels, transitioning from static minimum/max duty cycle constraints to dynamic adaptation that preserves both reliability and linearity

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of the ramp signal (minimum level) dynamically based on input signal conditions. By adjusting the minimum level parameter in response to input signal amplitude variations, the system maintains a linear transfer function while ensuring reliable power stage operation, resolving the contradiction between reliability and linearity

Inventive Principle:
Principle #35Parameter changes

2Productivity

If low duty-cycle modulation schemes such as 1SPW are used, then the modulator operates at low duty cycles, but the transfer function becomes highly non-linear leading to significant distortion and reduced stability

Engineering Contradiction:
Improvemodulation efficiencyVSAvoidtransfer function stability
Core Design Contradiction:
ProductivityVSStability of the object's composition

Solution Approach 1:

The patent introduces dynamic adaptation where the ramp signal's minimum level is continuously adjusted based on the input signal amplitude. This dynamic approach allows the modulator to maintain low duty cycle operation for efficiency while adapting the ramp characteristics to preserve transfer function linearity and stability, eliminating the fixed non-linearity of traditional low duty-cycle schemes

Inventive Principle:
Principle #15Dynamics

3Manufacturing precision

If the peak value of the ramp signal is maintained equal to the input signal across the amplitude range, then distortion is reduced, but the device complexity increases due to adaptive adjustment mechanisms

Engineering Contradiction:
Improvetransfer function linearityVSAvoidadaptive ramp generator complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent implements parameter change by dynamically adjusting the ramp signal's minimum level based on input signal amplitude detection. This approach achieves distortion reduction through adaptive parameter modification while maintaining a relatively simple circuit architecture, balancing linearity improvement against complexity increase

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10862471B2Signal modulator
Publication Date: 2020.12.08 DIALOG SEMICONDUCTOR (UK) LTD
  • US10862471B2 patent drawing
  • US10862471B2 patent drawing
  • US10862471B2 patent drawing

AI summary

A signal modulator for modulating at least one input signal is disclosed. The modulator includes an adaptive ramp generator receiving a clock signal having a clock cycle. The adaptive ramp generator provides a ramp signal having a profile starting from a minimum level adjusted in each clock cycle. The signal modulator may receive a first, second, and third input signal, and a clock signal. The first and second input signals may derive from a single signal where the second signal is equal to the first signal shifted by 180 degrees. The third signal may be a fixed level that sets the nominal duty cycle of the modulator. The input signal having the highest amplitude among the first, second, and third input signals is identified. The minimum level of the ramp signal is adjusted, and the peak value of the ramp maintained substantially equal to the signal having the highest amplitude.