Adaptive-Biased RDAC Ladder for Temperature-Stable Reference Voltage
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Solution Overview
Problem
Resistive digital-to-analog converters (RDAC) suffer from linearity performance degradation due to leakage current variations, which cause output reference voltage fluctuations with temperature changes, affecting system performance in applications like free running oscillators.
Innovation Solution
A dual resistor ladder DAC circuit with a unity gain buffer connected in feedback to drive the bulk semiconductor substrate regions of fine trim NMOS switches, reducing diode leakage and temperature variation without increasing circuit area or power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If conventional RDAC designs with MOSFET switches connected to ground are used, then the circuit area is reduced, but diode leakages are created causing resistance variation and temperature-dependent reference voltage fluctuations
Solution Approach 1:
An intermediate p-type diffusion region is introduced between the n-well substrate and the bulk of NMOS switches. This intermediate region acts as a mediator that prevents direct diode formation between the reference node and substrate, thereby eliminating leakage current paths while maintaining compact circuit area. The intermediate region serves as a buffer that blocks harmful leakage without requiring additional isolated p-well rings.
2Reliability
If additional isolated p-well rings are added to reduce leakage current, then reference voltage stability improves, but circuit area increases significantly
Solution Approach 1:
The invention merges the substrate connection function with the leakage prevention function by integrating the intermediate p-type diffusion region directly into the existing substrate structure. Instead of adding separate isolated p-well rings around each switch, the intermediate region is combined with the reference node configuration, achieving leakage reduction without increasing circuit area.
3Device complexity
If the bulk substrate regions of NMOS switches are directly connected to ground, then circuit complexity is reduced, but leakage current increases causing linearity performance degradation
Solution Approach 1:
The intermediate p-type diffusion region serves as an intermediary layer between the NMOS switch bulk and the ground-connected n-well substrate. This intermediary structure maintains the simple ground connection architecture while preventing direct leakage current paths, thereby preserving linearity performance without increasing circuit complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves a fine step temperature variation of 40-44 μV over a specified temperature range, significantly improving stability compared to conventional solutions with larger variations.
Implementation Method 1
A switched resistor digital-to-analog converter (RDAC) circuit with adaptive body biasing to reduce temperature variation
Implementation Method 2
connected in feedback to receive the output reference voltage
Data Source
AI summary
A low current, adaptively-biased switched resistor digital-to-analog converter (RDAC) circuit, method and apparatus are provided with a coarse trim ladder and a fine trim ladder connected with a plurality of NFET switches to generate an output reference voltage from an input supply voltage, where the bulk semiconductor substrate regions for the NFET switches in at least the fine trim ladder are driven by a unity gain buffer which is connected in feedback to receive the output reference voltage and to generate a buffered reference voltage which is directly connected to bulk semiconductor regions of the NFET switches, thereby providing a low current, low circuit area solution with reduced leakage current and temperature variation.