Adaptive Read Speed Control for Storage Devices

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing storage devices, such as flash memory systems, face inefficiencies in data read speed management, as they often operate at a fixed speed, which can lead to suboptimal performance and reliability, especially when dealing with varying error rates and device states.

Innovation Solution

A storage device with a storage controller that dynamically adjusts the read speed between a normal and fast mode based on the device's state, switching between these modes depending on error thresholds and operational conditions to ensure reliability and performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a fixed read speed is used in storage devices, then device simplicity is maintained, but performance and reliability are suboptimal when dealing with varying error rates and device states

Engineering Contradiction:
Improvedata read reliabilityVSAvoidread speed management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements dynamic read speed adjustment by switching between first and second read speeds based on device state and error rates. The storage controller monitors device conditions and adaptively changes the read speed, transforming the static read speed system into a dynamic one that responds to real-time conditions, thereby improving reliability without excessive complexity

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the read speed parameter based on device state and error rate thresholds. By adjusting the read speed parameter dynamically according to monitored conditions, the system optimizes the balance between reliability and operational efficiency without requiring complex architectural changes

Inventive Principle:
Principle #35Parameter changes

2Productivity

If a fixed read speed is used, then device operation is simple, but performance is suboptimal during periods of low error rates

Engineering Contradiction:
Improvedata read speedVSAvoidread speed control mechanism
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system dynamically adjusts read speed between first and second speeds based on real-time device state monitoring. During periods of low error rates, the system switches to the faster second read speed to maximize productivity, while maintaining the ability to switch back when error rates increase, thus balancing performance and simplicity

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The storage controller implements feedback mechanisms by monitoring device state and error rates, then using this information to adjust read speed. This closed-loop control allows the system to automatically optimize productivity based on actual conditions without requiring complex manual intervention or overly sophisticated control mechanisms

Inventive Principle:
Principle #23Feedback

3Speed

If read speed is increased to improve performance, then data access is faster, but reliability may be compromised when error rates are high

Engineering Contradiction:
Improvedata read speedVSAvoiddata read reliability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent implements conditional dynamic speed adjustment where the read speed changes from first to second speed based on error rate thresholds and device state. This dynamic approach allows the system to achieve faster speeds when conditions permit while maintaining reliability when error rates are high, resolving the contradiction between speed and reliability

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the read speed parameter adaptively based on monitored error rates and device state. By adjusting this critical parameter according to real-time conditions, the system optimizes the trade-off between read speed and reliability, achieving fast access when safe and slower access when necessary to maintain data integrity

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP3961634B1Storage device and operating method thereof
Publication Date: 2025.03.26 SAMSUNG ELECTRONICS CO LTD
  • EP3961634B1 patent drawingFigure 1~2
  • EP3961634B1 patent drawingFigure 3~4
  • EP3961634B1 patent drawingFigure 5~6

AI summary

A storage device is provided. The storage device includes a memory device including a memory cell array configured to store metadata and main data and a storage controller configured to access the memory device and control the memory device, wherein the storage controller is configured to read data from the memory device at a speed adaptively varying to a first read speed or a second read speed according to a state of the memory device, the second read speed being faster than the first read speed.