Adaptive Read Threshold Voltage Tracking with Charge Leakage Mitigation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Solid-state storage devices face data errors due to charge leakage, which shifts read voltage levels over time, affecting the accuracy of data retrieval and requiring improved adaptive read reference voltage tracking techniques to mitigate these effects.
Innovation Solution
The implementation of adaptive read reference voltage tracking techniques that employ charge leakage mitigation by determining and applying reference voltage offsets based on shifts over time, optionally after a predefined charge leakage settling time, to adjust read reference voltages for multi-level memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If adaptive reference voltage tracking algorithms are used to maintain updated channel parameters, then read accuracy is improved, but charge leakage effects still cause data errors over time
Solution Approach 1:
The system performs preliminary characterization of charge leakage effects by conducting read operations at multiple reference voltages after programming memory cells. This preliminary action allows the system to measure voltage distribution and determine optimal reference voltages before actual data retrieval operations, compensating for charge leakage that occurs during programming and storage.
Solution Approach 2:
The system implements feedback by continuously monitoring read errors and adjusting reference voltages based on observed charge leakage patterns. The controller characterizes charge leakage effects and uses this information to adaptively adjust reference voltages for subsequent read operations, creating a closed-loop system that maintains accuracy despite time-varying charge leakage.
2Productivity
If read operations are performed immediately after programming, then productivity is improved, but charge leakage has not settled causing data errors
Solution Approach 1:
The system performs preliminary read operations at multiple reference voltages immediately after programming to characterize charge leakage effects. This allows the system to gather information about voltage distributions and charge leakage patterns without requiring extended settling time, enabling rapid subsequent operations with accurate reference voltages.
Solution Approach 2:
The system dynamically adjusts reference voltages based on the timing of operations and observed charge leakage patterns. By determining optimal reference voltages through preliminary characterization and then applying them consistently, the system adapts to charge leakage effects without requiring static waiting periods, maintaining both speed and accuracy.
3Reliability
If multiple read operations are performed at different reference voltages to characterize charge leakage, then data retention is improved, but operation time increases
Solution Approach 1:
The system performs charge leakage characterization through preliminary read operations at multiple reference voltages. By conducting these operations systematically after programming and using the results to determine optimal reference voltages for subsequent operations, the system minimizes the time required for accurate data retrieval while maintaining data retention reliability.
Data Source
AI summary
Adaptive read reference voltage tracking techniques are provided that employ charge leakage mitigation. An exemplary device comprises a controller configured to: determine at least one reference voltage offset for a plurality of read reference voltages, wherein the at least one reference voltage offset is determined based on a shift in one or more of the read reference voltages over time; shift the plurality of read reference voltages using the at least one reference voltage offset; and employ the plurality of read reference voltages shifted by the at least one reference voltage offset to read data from the multi-level memory cells. The shifting step is optionally performed after a predefined time interval that approximates a settling time after a programming of the multi-level memory cells until a charge leakage of the multi-level memory cells has settled. The reference voltage offsets are optionally determined based on a shift in the read reference voltages after a predefined time interval since a programming of the multi-level memory cells.