Memory Controller Adaptive Read Voltage for Shrinking-Cell Errors
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Solution Overview
Problem
As memory cell sizes decrease, the likelihood of errors during data writing and reading operations increases, leading to performance deterioration in memory devices.
Innovation Solution
A controller and memory device configuration that includes a history table to manage read voltage levels based on fail bit information, adjusting read voltages for memory banks to reduce errors and enhance performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the size of memory cells is reduced to increase memory capacity and enhance performance, then memory capacity and performance are improved, but the possibility of errors during data writing and reading operations increases
Solution Approach 1:
The patent dynamically adjusts the read voltage parameter based on the number of fail bits detected during error correction operations. When fail bits are detected, the read voltage is increased to improve reading reliability. This parameter change allows the system to maintain high performance with small memory cells while compensating for increased error rates through adaptive voltage adjustment.
Solution Approach 2:
The patent implements a feedback mechanism where the controller monitors fail bit information from error correction operations and uses this information to update the read voltage for subsequent read operations. The history table stores previous fail bit counts and corresponding voltage levels, allowing the system to learn from past errors and adjust future operations accordingly, thereby reducing error occurrence over time.
2Reliability
If the read voltage is increased to reduce error occurrence, then reliability is improved, but performance deterioration may occur due to increased voltage
Solution Approach 1:
The patent makes the read voltage dynamic rather than fixed. The voltage is adjusted based on real-time error conditions detected during error correction operations. When errors are detected, voltage is increased to improve reliability; when operations are successful, the voltage remains at lower levels to maintain performance. This dynamic adjustment resolves the contradiction between reliability and performance.
Solution Approach 2:
The patent changes the read voltage parameter adaptively based on the number of fail bits detected. By linking voltage adjustment to specific error conditions rather than applying high voltage continuously, the system improves reliability only when needed while maintaining optimal performance during normal operation.
3Reliability
If error correction operations are performed frequently to reduce errors, then reliability is improved, but operation time increases leading to performance deterioration
Solution Approach 1:
The patent uses feedback from error correction operations to optimize future operations. By storing fail bit information in a history table and using this information to adjust read voltage, the system learns from past errors and reduces the need for frequent re-checks, thereby reducing overall operation time while maintaining high reliability.
Solution Approach 2:
The patent performs preliminary voltage adjustment based on historical error data before actual read operations occur. By pre-adjusting the read voltage according to patterns learned from previous error correction operations, the system can perform corrections more efficiently and reduce the time required for subsequent operations.
Data Source
AI summary
Embodiments of the present disclosure update a level value indicating a read voltage according to a fail bit detected during a read operation for a memory and provide the updated level value to the memory before transmitting a read command to allow a read operation to be performed according to the read voltage indicated by the updated level value, thereby enhancing the accuracy of the read operation through a read operation suitable for the characteristics for each storage area of the memory and enhancing the operation performance and reliability of the memory.