Adaptive Read Voltage Grouping for Nonvolatile Memory Error Reduction
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Solution Overview
Problem
Nonvolatile memory devices face read errors due to distortion of threshold voltage distributions in memory cells caused by factors like charge leakage and program disturbances, leading to incorrect data retrieval.
Innovation Solution
The method involves grouping aggressor memory cells into cell groups based on threshold voltages and determining adaptive read conditions for each group, allowing for optimal read operations to reduce errors and enhance reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a predetermined read voltage is applied to read memory cells, then the read operation can be performed, but read errors occur due to distortion of threshold voltage distributions caused by charge leakage and program disturbances
Solution Approach 1:
The memory block is divided into multiple sub-blocks, and the read operation is segmented into multiple stages. In each stage, a different read voltage is applied to different sub-blocks based on their specific threshold voltage distribution characteristics. This segmentation allows the system to maintain high read speed by processing different regions with optimized voltages while improving data accuracy by accounting for local variations caused by charge leakage and program disturbances.
Solution Approach 2:
The read voltage is made dynamic rather than fixed. The control circuit adjusts the read voltage level based on the detected threshold voltage distribution of the memory block. When charge leakage or program disturbance is detected, the system dynamically selects appropriate read voltages from a plurality of available voltage levels, enabling the read operation to adapt to changing conditions and maintain both speed and accuracy.
2Adaptability or versatility
If the threshold voltage distribution is distorted due to charge leakage and program disturbances, then the intended distribution shifts and broadens, but this causes read fails and incorrect data retrieval
Solution Approach 1:
Before performing the actual read operation, the system performs preliminary detection of the threshold voltage distribution characteristics of the memory block. Based on this preliminary information, the control circuit pre-selects appropriate read voltages from a plurality of voltage levels. This preliminary action allows the system to anticipate and compensate for potential distribution distortion, ensuring that the subsequent read operation can accurately distinguish data even when charge leakage or program disturbance occurs.
Solution Approach 2:
The system changes the read voltage parameter based on the detected threshold voltage distribution. Instead of using a fixed read voltage, the control circuit selects from multiple voltage levels (e.g., first read voltage, second read voltage) depending on the specific conditions of the memory block. This parameter adaptation allows the system to maintain measurement precision despite variations in threshold voltage distribution caused by physical degradation mechanisms.
3Device complexity
If a single read voltage is used for all memory cells, then the operation is simple and fast, but it cannot accommodate variations in threshold voltage distributions across different memory regions
Solution Approach 1:
The memory block is divided into multiple sub-blocks, and the read operation is segmented into multiple stages. In each stage, a different read voltage is applied to different sub-blocks based on their specific threshold voltage distribution characteristics. This segmentation allows the system to maintain high read speed by processing different regions with optimized voltages while improving data accuracy by accounting for local variations caused by charge leakage and program disturbances.
Solution Approach 2:
The control circuit is designed with multi-functionality to handle both simple and complex read scenarios. It can select from a plurality of read voltages and apply them selectively to different sub-blocks based on detected conditions. This universal design allows the same hardware structure to adapt to varying threshold voltage distributions across the memory block without requiring additional complex external control mechanisms.
Data Source
AI summary
Aggressor memory cells connected to one or more aggressor wordlines are grouped into aggressor cell groups by performing a read operation with respect to the aggressor wordlines based on one or more grouping read voltages, where the aggressor wordlines are adjacent to a selected wordline corresponding to a read address among wordlines of a memory block. Selected memory cells connected to the selected wordline are grouped into a selected cell groups respectively corresponding to the aggressor cell groups. Group read conditions respectively corresponding to the selected cell groups are determined and group read operations are performed with respect to the plurality of selected cell groups based on the group read conditions. The read errors are reduced by grouping the selected memory cells into the selected cell groups according to the change of operation environments.