Adaptive Reference Voltage Circuit for Cascode MOS Protection
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Solution Overview
Problem
Existing solutions for generating a reference voltage for cascode structures in integrated circuits face challenges such as voltage variations, temperature instability, and compatibility with MOS transistors' voltage withstand limits, leading to performance degradation and manufacturing process variability.
Innovation Solution
A reference voltage generation device comprising a first voltage divider bridge, MOS transistors, and buffer circuits, configured to provide adaptive reference voltages (VrefH and VrefL) that follow the variations of the primary supply voltage VDDE, ensuring the transistors operate within their voltage limits and maintaining stability across different power modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If standard DC voltage generation circuits are used to generate a reference voltage independent of supply voltage variations, then the reference voltage stability is improved, but the circuit is particularly subject to manufacturing process variations and the generated voltage may be too low or too high for cascode structures
Solution Approach 1:
The patent changes the parameter of reference voltage generation by using a resistive divider network that directly derives the reference voltage from the first supply voltage VDDE, rather than using standard DC generation circuits. This allows the reference voltage to track supply voltage variations while maintaining stability through the resistive division ratio, avoiding manufacturing process variation issues associated with standard circuits.
Solution Approach 2:
The resistive divider bridge serves multiple functions: it generates the reference voltage, provides voltage scaling to ensure the reference voltage is within the withstand limit of cascode transistors, and maintains adaptability to different supply voltage levels. This multi-functionality resolves the contradiction by making the reference voltage generation universal across different operating conditions.
2Ease of operation
If the second voltage is used as the reference voltage for cascode structures, then the reference voltage is available, but the second voltage must be applied before the first voltage to avoid destroying transistors and voltage variations degrade performance
Solution Approach 1:
The patent introduces a resistive divider network as an intermediary between the first supply voltage VDDE and the cascode structures. This intermediary generates a scaled reference voltage that is guaranteed to be within the withstand limit of cascode transistors, eliminating the need for complex voltage ordering control and protection circuits while ensuring transistor safety.
3Adaptability or versatility
If the generated reference voltage is too low, then it cannot be used for cascode structures operating at nominal first voltage, but if it is too high, then it cannot be used when the first voltage is at lower values for low-power mode
Solution Approach 1:
The patent makes the reference voltage dynamic by deriving it directly from the first supply voltage VDDE through a resistive divider. As VDDE varies between nominal and low-power levels, the reference voltage automatically adjusts proportionally, ensuring it remains within the withstand limit of cascode transistors across all operating modes without requiring manual adjustment or multiple reference voltage sources.
Data Source
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AI summary
This description concerns a device (REFGEN) comprising: a first voltage divider (200) between a first node (202) at a supply voltage (VDDE) and a second node (204) at a reference potential (GND); a first transistor (Ten) and a second voltage divider (208) in series between the first and second nodes, the first transistor having its gate connected to the first divider; a buffer circuit (BUFFa1) having an input (220) connected to a node (214) of the second divider and an output (218) providing a reference voltage (VrefL); and a second transistor (To1) having its drain connected to the output of the buffer circuit and its source connected to one of the first and second nodes. The first transistor (Ten) is cut off if the supply voltage (VDDE) is below a threshold. The second transistor is conducting if the first transistor is cut off, and vice versa.