Adaptive RF Bias Circuit for Linearity and PAE at Varying Power
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Solution Overview
Problem
Existing RF amplifiers in integrated circuits face challenges in maintaining output power linearity and power added efficiency (PAE) at high frequencies due to fixed bias voltages and transistor dimensions, especially in applications involving wide frequency ranges and varying power levels.
Innovation Solution
A bias circuit using NMOS transistors in parallel configuration with a voltage divider and low-pass filter, dynamically adjusting the bias voltage based on RF signal power levels to enhance PMOS overdrive voltage, thereby improving output power linearity and PAE.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If fixed bias voltages are used in RF amplifiers, then circuit design is simplified, but output power linearity and power added efficiency deteriorate at high frequencies and varying power levels
Solution Approach 1:
The bias circuit dynamically adjusts the bias voltage level based on the power level of the RF signal. The circuit includes transistors configured to sense the RF signal power and automatically modulate the bias voltage accordingly, transforming the static biasing approach into a dynamic adaptation mechanism that responds to real-time operating conditions.
Solution Approach 2:
The bias circuit incorporates a feedback mechanism where the RF signal power level is sensed and used to control the bias voltage generation. The circuit monitors the input RF signal characteristics and feeds this information back to adjust the bias voltage, creating a closed-loop system that optimizes amplifier performance based on actual operating conditions.
2Ease of manufacture
If predetermined voltages and transistor dimensions are used, then manufacturing is easier, but performance adapts poorly to wide frequency ranges and varying power levels
Solution Approach 1:
The circuit changes the bias voltage parameter dynamically based on the RF signal power level. Instead of using fixed transistor dimensions and voltages, the circuit modifies the bias voltage parameter in response to varying operating conditions, enabling the same hardware to adapt to wide frequency ranges and different power levels without requiring multiple device variants.
3Reliability
If adaptive bias voltage adjustment is implemented, then output power linearity and PAE improve, but device complexity increases
Solution Approach 1:
The bias circuit is designed to automatically adjust the bias voltage without requiring external control signals or complex management circuits. The circuit uses the RF signal itself as the control input, allowing it to self-regulate based on the signal power level, thereby reducing the need for additional control infrastructure and minimizing overall system complexity.
Data Source
AI summary
A circuit includes first and second input terminals configured to receive a radio frequency (RF) signal, a first output terminal configured to output a direct current (DC) signal, first and second NMOS transistors coupled in parallel between a reference node and a first node and including gates capacitively coupled to the first and second input terminals, a voltage divider coupled between the first node and a power supply node, wherein the voltage divider includes a voltage tap, and a low-pass filter coupled between the voltage tap and the first output terminal. The circuit is configured to decrease a voltage level of the DC signal responsive to an increase in a power level of the RF signal.