Adaptive Snooping Control for Multi-Core Processor Bus Latency

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Solution Overview

Problem

In multi-core processor chips, the increasing number of cores leads to longer broadcast times for bus commands and higher power consumption, as well as inefficient use of resources due to blind responses to fastpath commands that cannot be satisfied by caches, wasting directory read bandwidth and consuming unnecessary power.

Innovation Solution

Implementing a method to dynamically enable or disable snooping on a fastpath bus based on statistical data indicating the likelihood of a local cache's ability to provide early data intervention, thereby optimizing bus usage and reducing power consumption by only enabling snooping when the cache can satisfy requests.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If snooping is enabled for all fastpath commands, then cache coherency is maintained, but power consumption increases and directory read bandwidth is wasted

Engineering Contradiction:
Improvecache coherencyVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent dynamically changes the snooping parameter based on statistical analysis of command patterns. The system monitors whether early data intervention is successful over time and adjusts the snooping enablement state accordingly, transforming a static parameter into a dynamic one that adapts to actual workload characteristics

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The system implements feedback by monitoring the success rate of early data intervention attempts and using this information to control future snooping behavior. The statistical data about command satisfaction rates feeds back into the decision logic that determines whether snooping should be enabled or disabled

Inventive Principle:
Principle #23Feedback

2Reliability

If snooping is enabled for all fastpath commands, then cache coherency is maintained, but directory read bandwidth is consumed unnecessarily

Engineering Contradiction:
Improvecache coherencyVSAvoiddirectory read bandwidth
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

Instead of enabling snooping for all fastpath commands (excessive action), the system enables it only for the subset of commands that are likely to benefit based on statistical patterns. This partial action approach applies snooping selectively rather than universally, reducing unnecessary directory reads while maintaining coherency where needed

Inventive Principle:
Principle #16Partial or excessive action

3Productivity

If the number of core processors is increased, then processing capacity is improved, but bus command broadcast time increases

Engineering Contradiction:
Improveprocessing capacityVSAvoidbus command broadcast time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent extracts critical path operations from the general bus broadcast mechanism by implementing early data intervention on the fastpath. By handling certain commands through this specialized path that bypasses full bus arbitration and broadcast, the system reduces the time impact of having multiple cores while maintaining processing capacity

Inventive Principle:
Principle #2Taking out (Extraction)

4Productivity

If the number of core processors is increased, then processing capacity is improved, but power consumption increases

Engineering Contradiction:
Improveprocessing capacityVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The system introduces dynamic power management for the snooping function. Rather than having snooping continuously enabled across all cores, the system dynamically adjusts snooping activation based on statistical workloads and cache satisfaction rates, allowing power consumption to adapt to actual processing needs

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10997075B2Adaptively enabling and disabling snooping bus commands
Publication Date: 2021.05.04 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US10997075B2 patent drawing
  • US10997075B2 patent drawing
  • US10997075B2 patent drawing

AI summary

Statistical data is used to enable or disable snooping on a bus of a processor. A command is received via a first bus or a second bus communicably coupling processor cores and caches of chiplets on the processor. Cache logic on a chiplet determines whether or not a local cache on the chiplet can satisfy a request for data specified in the command. In response to determining that the local cache can satisfy the request for data, the cache logic updates statistical data maintained on the chiplet. The statistical data indicates a probability that the local cache can satisfy a future request for data. Based at least in part on the statistical data, the cache logic determines whether to enable or disable snooping on the second bus by the local cache.