Adaptive Synchronous Drivers for Multi-Phase SMPS
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Solution Overview
Problem
Multi-phase switched mode power supplies with synchronous rectification face efficiency losses due to the need for sensing resistors, which waste output energy and generate heat, or require complex 'sample and hold' circuitry and low pass filters to manage high-frequency noise, complicating the system and reducing stability.
Innovation Solution
A multi-phase SMPS with adaptive synchronous drivers that incorporates a pulse skipping function, allowing entire pulses to be skipped or turned off, using tri-stating to maintain inductor current above zero, and a loop controller to prevent output voltage from falling below a target value, minimizing noise ripple and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If sensing resistors are included in series with each output inductor to monitor current, then current monitoring is achieved, but output energy is wasted and efficiency is reduced
Solution Approach 1:
The patent extracts the current sensing function from the output inductor path and relocates it to the high-side switch path, where sensing resistors cause minimal energy loss since they are in series with the switching node rather than the continuous output current path
Solution Approach 2:
The patent introduces 'sample and hold' circuitry as an intermediary to capture and store the instantaneous current information at the end of each switching cycle, allowing this information to be used in the next cycle without requiring continuous high-frequency sampling
2Loss of energy
If sensing resistors are disposed in series with the high-sides of switches to reduce energy dissipation, then energy waste is reduced, but complex 'sample and hold' circuitry and low pass filters are required to manage discontinuous current and high-frequency noise
Solution Approach 1:
The patent applies preliminary action by capturing the current information at the optimal moment (end of each switching cycle) before the next cycle begins, storing it in the sample and hold circuitry for immediate use in the next control decision
Solution Approach 2:
The patent implements pulse skipping mode where entire switching pulses are skipped or turned off when not required, using tri-stating to maintain inductor current above zero, thereby reducing the frequency of switching operations and associated noise without requiring complex filtering
3Object-affected harmful factors
If low pass filters are added to remove high frequency noise from current sense signals, then noise susceptibility is reduced, but component count and complexity are substantially increased
Solution Approach 1:
The patent employs periodic action by operating multiple phases in an interleaved manner with different phases switching at different times, which naturally spreads the switching noise across different time intervals and reduces peak noise levels without requiring additional filtering components
Solution Approach 2:
The patent performs preliminary noise reduction by using the sample and hold circuitry to capture clean current information at the end of each switching cycle, before high-frequency noise can propagate through the system, and uses this held information for next-cycle control decisions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances efficiency by minimizing power consumption and reducing component complexity, maintaining stability and efficiency without modifying basic PWM mechanisms, while reducing energy waste and noise susceptibility.
Implementation Method 1
Energy from each driver pulse is stored into a corresponding inductor and supplied as current to a load, creating the load voltage
Data Source
AI summary
A multi-phase switching mode power supply (SMPS) with adaptive synchronous drivers is provided. A pulse width modulator creates n periodic interleaved modulation pulses having a pulse width responsive to a load voltage. Modulation pulses are converted into selectively enabled driver pulses having a duty cycle responsive to the modulation pulse. The polarity of the voltage is detected at a completion of each driver pulse duty cycle. A comparator signal is supplied in response to comparing detected voltages to a reference voltage, and in turn, driver gating signals are supplied to selectively enable driver pulses in response to analyzing comparator signals. The comparator signals are summed and integrated. Driver pulses are enabled or disabled in response to the integrated sum. Energy is stored from each driver pulse into a corresponding inductor, and supplied as current to a load, creating the load voltage.