Adaptive Timeout Mechanism for Cloud Transaction Stability

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Solution Overview

Problem

Cloud computing environments face completion timeout errors due to unresponsive or malicious client-defined hardware, leading to performance and security issues, particularly during transactions between devices or subsystems.

Innovation Solution

Implementing an adaptive timeout mechanism with a preventive timer on the completer device that dynamically adjusts its timeout value based on the number of timeout events, preventing completion timeout errors by sending error messages before they occur and encapsulating client configurable logic within a shell logic to restrict access and ensure protocol compliance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If client-defined hardware is enabled within cloud infrastructure, then hardware versatility and performance optimization are improved, but system stability and security deteriorate due to improper configuration and vulnerability to attacks

Engineering Contradiction:
Improvehardware versatilityVSAvoidsystem stability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

A timeout prevention block is introduced as an intermediary component between the client-defined hardware and the rest of the cloud infrastructure. This block monitors transactions and sends completion status information to the requester before actual completion timeout errors occur, acting as a mediator that protects the system while allowing client hardware to function

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The timeout prevention block performs preliminary monitoring and communication of completion status before the actual timeout error occurs. By proactively sending completion information to the requester, the system prevents the harmful effect of completion timeout errors before they can impact system stability

Inventive Principle:
Principle #10Preliminary action

2Device complexity

If fixed timeout values are used, then device complexity is reduced, but adaptability to varying transaction conditions deteriorates

Engineering Contradiction:
Improvetimeout mechanism complexityVSAvoidtimeout adaptability
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The timeout mechanism transitions from a fixed value to a dynamic, adaptive value that changes based on monitored transaction conditions. The timeout prevention block adjusts timeout parameters in response to observed transaction patterns, making the system adaptable to varying conditions while adding only minimal complexity through automatic adjustment

Inventive Principle:
Principle #15Dynamics

3Adaptability or versatility

If timeout values are extended to accommodate slow hardware, then hardware compatibility is improved, but system performance and security deteriorate due to increased exposure to attacks and resource waste

Engineering Contradiction:
Improvehardware compatibilityVSAvoidsystem performance
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The system dynamically changes timeout parameters based on actual transaction monitoring. Rather than using a universally extended timeout that benefits all hardware, the mechanism adjusts parameters individually based on observed performance characteristics, allowing optimization for each hardware component while maintaining overall system performance

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11048569B1Adaptive timeout mechanism
Publication Date: 2021.06.29 AMAZON TECH INC
  • US11048569B1 patent drawing
  • US11048569B1 patent drawing
  • US11048569B1 patent drawing

AI summary

Disclosed herein are techniques for preventing or minimizing completion timeout errors on a computer device. An apparatus include a processing logic circuit and a timeout logic. The timeout logic is configured to: generate a timeout event based on a transaction not completed by the processing logic circuit within a timeout period; determine a number of the timeout events generated during a monitoring period; and responsive to determining that the number equals to or exceeds a threshold, reduce the timeout period.