Adaptive Verification Pulses for Phase Change Memory Programming
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Solution Overview
Problem
Phase change memory devices, such as PRAM, require longer programming times compared to conventional memory devices, necessitating improvements in programming speed and efficiency.
Innovation Solution
A method and system for programming phase change memory devices that involves applying write pulses and verification pulses to phase change memory cells, with the number and intervals of verification pulses varied based on each cell's verification result to optimize programming efficiency and speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional programming methods are used in phase change memory devices, then data can be stored in memory cells, but the programming time is significantly longer than in conventional memory devices
Solution Approach 1:
The patent applies preliminary action by performing verification operations during the programming process itself. Multiple verification pulses are applied at different stages (during programming, after programming, and at intermediate points) to detect whether cells have been successfully programmed before the full programming sequence completes. This allows the system to identify successfully programmed cells early and avoid unnecessary additional programming cycles for those cells, thereby reducing overall programming time while maintaining data storage functionality.
2Reliability
If verification pulses are applied to all phase change memory cells, then programming accuracy can be ensured, but current consumption increases
Solution Approach 1:
The patent applies local quality by differentiating the verification treatment for different memory cells based on their individual programming status. Instead of applying uniform verification to all cells, the system applies verification pulses selectively - some cells receive multiple verification pulses while others receive fewer or none, depending on whether they have been successfully programmed. This localized approach ensures programming accuracy for cells that need it while minimizing current consumption by avoiding unnecessary verification of already-successfully-programmed cells.
Solution Approach 2:
The patent applies partial action by performing verification operations only on a subset of memory cells at any given time rather than all cells simultaneously. The verification process is divided into multiple stages with different verification intensities applied to different cell groups. This allows the system to maintain high programming accuracy for cells that require verification while reducing overall current consumption by spreading verification operations across time and selectively targeting only those cells that need verification.
3Reliability
If the number of verification pulses is increased for all cells, then programming reliability improves, but programming time increases
Solution Approach 1:
The patent applies dynamics by making the verification pulse application adaptive rather than static. The system dynamically adjusts the number and timing of verification pulses based on real-time feedback from intermediate verification results. Cells that pass verification early receive fewer total verification pulses, while cells that fail verification receive additional pulses. This dynamic approach maintains high programming reliability by ensuring thorough verification for problematic cells while reducing programming time by minimizing verification for successfully programmed cells.
Solution Approach 2:
The patent applies feedback by using intermediate verification results to control subsequent verification and programming operations. The system continuously monitors whether cells have been successfully programmed at various stages and uses this feedback information to adjust the verification strategy. Cells that show successful programming early in the process have their verification reduced or terminated, while cells that fail verification trigger additional verification pulses or re-programming. This feedback mechanism ensures programming reliability while optimizing programming time by avoiding unnecessary verification operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces programming time and current consumption while enhancing efficiency by adapting the verification pulse application to each phase change memory cell's status, allowing for faster and more reliable data programming.
Implementation Method 1
a phase change memory cell MC includes a phase change layer PM which is transformed between a crystalline state and an amorphous state
Implementation Method 2
the resistance of the phase change layer PM becomes greater, and thus, the phase change layer PM has more chance of passing the verification
Data Source
AI summary
In a method of programming a phase change memory device, write data is programmed in a plurality of phase change memory cells by applying write pulses to each of the plurality of phase change memory cells. Whether each of the phase change memory cells is programmed is verified by applying verification pulses to each of the phase-change memory cells. A number of applications for the verification pulses and the intervals between respective applications of the verification pulses are varied in accordance with a verification result for each of the phase-change memory cells.