Variable Resistance Memory Forming via Adaptive Voltage Pulses
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional variable resistance nonvolatile memory devices require high forming voltages and exhibit variations in forming voltage across different memory cells, making it challenging to achieve stable resistance changes and efficient manufacturing.
Innovation Solution
A forming method is introduced that applies a series of voltage pulses to a variable resistance nonvolatile memory element with an oxygen-deficient transition metal oxide layer, allowing the resistance state to change between high and low resistance states based on threshold voltages, and increasing the cumulative pulse application time to enhance forming success probability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional forming voltage is applied to variable resistance nonvolatile memory elements, then resistance change can be achieved, but forming voltage varies across different memory cells and requires high voltage levels
Solution Approach 1:
The forming process is segmented into multiple discrete voltage pulse applications rather than a single continuous voltage application. Each pulse has a controlled width and amplitude, allowing incremental progress toward forming while monitoring success after each pulse. This segmentation enables better control over the forming process and reduces variability across memory cells.
Solution Approach 2:
The method applies preliminary voltage pulses with carefully controlled parameters before attempting full forming. By pre-conditioning the memory cell with multiple sub-threshold or threshold-level pulses, the system prepares the variable resistance element for successful forming at lower voltages, reducing the need for high voltage applications and improving consistency.
2Productivity
If high forming voltage is applied, then resistance state change can be achieved, but manufacturing yield decreases due to variations across memory cells
Solution Approach 1:
The forming process uses periodic voltage pulse applications with controlled frequency and duty cycle. Instead of continuous high voltage application, the system applies multiple periodic pulses with optimized width and amplitude, allowing the memory cell to respond incrementally. This periodic approach improves forming efficiency while reducing stress on individual cells, thereby increasing manufacturing yield.
Solution Approach 2:
The method dynamically adjusts voltage pulse parameters (amplitude, width, frequency) based on the forming progress and cell response. By changing these parameters systematically, the system achieves effective forming at lower voltage levels with better consistency across memory cells, improving both productivity and reliability.
3Reliability
If multiple voltage pulses are applied to increase forming success probability, then forming reliability improves, but process time increases
Solution Approach 1:
The forming process is made dynamic by adaptively adjusting pulse parameters based on real-time cell response. The system monitors whether each pulse contributes to successful forming and dynamically modifies subsequent pulse characteristics (amplitude, width, interval) to optimize the balance between reliability and time. This dynamic adaptation prevents unnecessary prolonged processing while ensuring forming success.
Solution Approach 2:
The method incorporates feedback mechanisms where the response to each voltage pulse is evaluated to determine forming progress. Based on this feedback, the system adjusts the number, amplitude, and width of subsequent pulses. This feedback-driven approach ensures that forming is achieved with the minimum necessary pulses, reducing process time while maintaining high success rates.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method reduces the forming voltage to a lower, more consistent level, enabling efficient and reliable resistance state changes across all memory cells, improving manufacturing yield and reliability while preventing variations in forming voltage.
Implementation Method 1
a resistance value reversibly changes based on electrical signals
Implementation Method 2
a variable resistance nonvolatile memory element including: a first electrode connected to the switch element; a second electrode; and an oxygen-deficient transition metal oxide layer provided between the first electrode and the second electrode
Data Source
AI summary
A forming method of a variable resistance nonvolatile memory element capable of lowering a forming voltage and preventing variations of the forming voltage depending on variable resistance elements. The forming method is for initializing a variable resistance element, including a step (S24) of determining whether or not a current flowing in a 1T1R memory cell is greater than a reference current; a step (S22) of applying a forming positive voltage pulse having a pulse width (Tp(n)) is gradually increased when it is determined that the current is not greater than the reference current; and a step (S23) of applying a negative voltage pulse having a pulse width Tn equal to or shorter than a pulse width Tp(n). The determining step (S24), the application step (S22), and the application step (S23) are repeated until the forming becomes successful.