Adaptive Voltage Scaling Circuit for Chip Power Optimization
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Solution Overview
Problem
Determining the lowest working voltage for a chip to minimize power consumption is challenging due to the difficulty in constructing a reasonable test vector, requiring a significant number of chip tests and a time-consuming process, which hinders the implementation of adaptive voltage scaling technology effectively.
Innovation Solution
An adaptive voltage scaling circuit with a performance classification monitor and adaptive controller is integrated into the chip, allowing real-time detection of working performance at different voltages and automatic adjustment of the working voltage to reduce power consumption while meeting performance requirements, thereby reducing the need for extensive testing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If design for test vector is used to determine the lowest working voltage, then the lowest working voltage can be determined, but a great number of chips are required for test and the test procedure is time-consuming
Solution Approach 1:
The patent applies preliminary action by pre-configuring multiple delay circuits with different delay values before actual operation. During voltage determination, these pre-configured circuits are simply selected and measured rather than creating and testing new test vectors from scratch. This pre-prepared structure significantly reduces the time required for voltage determination while maintaining measurement precision.
Solution Approach 2:
The patent implements dynamics by making the delay circuit configuration adjustable and selectable during operation. The system can dynamically switch between different delay circuit configurations based on measured results, allowing adaptive refinement of voltage determination without requiring complete re-testing. This dynamic adjustment capability reduces both time and chip quantity requirements.
2Measurement precision
If design for test vector is used to determine the lowest working voltage, then the lowest working voltage can be determined, but a great number of chips are required for test
Solution Approach 1:
The patent applies preliminary action by pre-configuring multiple delay circuits with different delay values before actual operation. During voltage determination, these pre-configured circuits are simply selected and measured rather than creating and testing new test vectors from scratch. This pre-prepared structure significantly reduces the time required for voltage determination while maintaining measurement precision.
Solution Approach 2:
The patent implements dynamics by making the delay circuit configuration adjustable and selectable during operation. The system can dynamically switch between different delay circuit configurations based on measured results, allowing adaptive refinement of voltage determination without requiring complete re-testing. This dynamic adjustment capability reduces both time and chip quantity requirements.
3Loss of energy
If conventional voltage scaling is used, then power consumption can be reduced, but the working voltage cannot be dynamically adjusted based on actual performance
Solution Approach 1:
The patent applies feedback by measuring the actual delay performance of the chip at different voltages and using this measurement information to determine the optimal lowest working voltage. The measured delay values feed back into the control logic, which then selects the appropriate voltage level. This closed-loop feedback mechanism enables dynamic voltage adjustment that adapts to actual chip performance, achieving both energy savings and adaptability.
Solution Approach 2:
The patent implements parameter changes by varying the working voltage based on measured performance parameters (delay values). The system measures delay at different voltage points and adjusts the operating voltage parameter accordingly. This parameter-based adaptation allows the system to optimize power consumption while maintaining required performance levels.
Data Source
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AI summary
The present invention discloses an adaptive voltage scaling circuit and a chip. The adaptive voltage scaling circuit includes a performance classification monitor and an adaptive controller, where the performance classification monitor is disposed inside the chip, and is configured to detect working performance of the chip at a current working voltage, and output a detection result signal to the adaptive controller; and the adaptive controller is connected to the performance classification monitor, and is configured to output a control signal to a power management module of the chip according to the detection result signal output by the performance classification monitor, where the control signal is used to control the power management module to adjust a working voltage of the chip. In embodiments of the present invention, test workload can be reduced.