Adaptive Voltage Scaling via Interconnect Delay Estimation
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Solution Overview
Problem
Conventional techniques for adjusting supply voltage in processing units (PUs) on a chip fail to effectively account for interconnect delays, which are crucial for determining optimal operating frequency, often requiring large and inconveniently placed back-end-of-line (BEOL) sensors.
Innovation Solution
A method that utilizes a combination of front-end-of-line (FEOL) sensors, temperature sensors, and analytical models to estimate interconnect delays and determine the supply voltage for signal paths, allowing for efficient operation without the need for extensive BEOL sensors during normal operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional sensors are used to account for gate delays, then transistor performance is monitored, but interconnect delays are not effectively accounted for
Solution Approach 1:
The patent segments the delay measurement function into two parts: FEOL sensors measure gate delays while temperature sensors estimate interconnect delays. This segmentation allows each sensor type to focus on its strengths, with FEOL sensors capturing transistor performance and temperature sensors capturing wire delay characteristics through resistance measurements.
Solution Approach 2:
The patent introduces temperature sensors as intermediary devices that indirectly measure interconnect delays through resistance measurements. Instead of directly measuring wire delays, the system uses temperature-resistance relationships to estimate interconnect delay components, which are then combined with gate delay measurements for comprehensive frequency management.
2Reliability
If BEOL sensors are used to measure interconnect delays, then wire dominated paths are accounted for, but chip area is consumed and placement is inconvenient
Solution Approach 1:
The patent makes temperature sensors multi-functional by using them for both thermal management and interconnect delay estimation. The same temperature sensors that monitor chip temperature for thermal control are also utilized to estimate resistance values and infer interconnect delays, eliminating the need for dedicated BEOL sensors.
Solution Approach 2:
The system uses existing temperature sensors that are already present on the chip for dual purposes: thermal management and interconnect delay estimation. This self-service approach allows the chip to monitor its own wire delay characteristics using components already deployed for temperature control, avoiding additional area consumption.
3Productivity
If supply voltage is increased to accommodate higher frequencies, then performance is improved, but power consumption increases
Solution Approach 1:
The patent implements dynamic supply voltage adjustment based on real-time measurements of both gate delays and estimated interconnect delays. The system continuously adapts the supply voltage to the actual operating conditions, increasing voltage only when and where needed to achieve target frequencies, rather than using static high-voltage designs that consume excessive power continuously.
Solution Approach 2:
The system changes the supply voltage parameter dynamically based on measured delay characteristics. By adjusting voltage according to actual gate and interconnect delay measurements, the system optimizes the voltage-frequency-power relationship, achieving higher frequencies only when delay measurements indicate sufficient timing margin, thereby reducing unnecessary power consumption.
4Ease of manufacture
If process variation is not accounted for, then manufacturing is simpler, but performance variability across die regions increases
Solution Approach 1:
The patent implements local quality monitoring by placing FEOL sensors in different regions of the chip to capture local gate delay characteristics. Combined with temperature sensors that estimate local interconnect delays, the system creates a fine-grained map of performance variations across the die, enabling region-specific voltage adjustments that account for local process variations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables accurate determination of supply voltage based on both gate and interconnect delays, ensuring reliable operation at desired frequencies with reduced sensor usage and increased efficiency.
Implementation Method 1
employing analytical models that relate temperature and resistance to interconnect delays
Data Source
AI summary
A method of setting a supply voltage in a device is disclosed. The method includes receiving a first plurality of inputs from a plurality of sensors that are representative of a gate delay of a signal path on the device, and receiving a second plurality of inputs from a plurality of temperature sensors. The method further includes estimating a plurality of interconnect delays for the signal path based on the second plurality of inputs, and determining the supply voltage for the signal path based on the first plurality of inputs and the plurality of interconnect delays.