Adaptive Wear Leveling for Mixed-Endurance Memory Dies
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Solution Overview
Problem
Existing memory sub-systems face inefficiencies due to the exclusion of low-capability dies during manufacturing, leading to increased costs and premature failure of memory devices, as they do not effectively manage wear leveling across dies with varying endurance and data retention capabilities.
Innovation Solution
Implementing adaptive wear leveling by classifying dies into capability bins and adjusting write operations based on their projected endurance and data retention capabilities, excluding blocks on low-capability dies from program/erase cycles to evenly distribute wear across the memory device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If low-capability dies are excluded during manufacturing, then device reliability is improved, but manufacturing cost increases and productivity decreases
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the wear distribution parameters for different dies based on their capability metrics. Instead of excluding low-capability dies, the system modifies the program/erase cycle distribution parameters to accommodate varying die capabilities, allowing all dies to be utilized while maintaining reliability.
Solution Approach 2:
The patent implements dynamics by introducing adaptive wear leveling that dynamically adjusts wear distribution based on real-time or measured capability metrics of each die. The system continuously monitors and adjusts the program/erase cycle allocation to match each die's endurance capabilities, transforming a static exclusion approach into a dynamic adaptation approach.
2Productivity
If uniform wear leveling is applied across all dies, then manufacturing cost decreases, but low-capability dies fail prematurely reducing reliability
Solution Approach 1:
The patent applies local quality by tailoring the wear leveling strategy to each individual die's capability characteristics. Instead of uniform treatment, the system assigns different program/erase cycle distributions to different dies based on their measured capability metrics, ensuring each die receives wear appropriate to its local characteristics.
Solution Approach 2:
The patent changes the wear distribution parameters adaptively based on each die's capability metric. The system modifies the program/erase cycle allocation parameters dynamically, adjusting the wear rate for each die to match its endurance capabilities, preventing premature failure while maintaining high utilization.
3Measurement precision
If capability metric measurement is implemented, then adaptive wear leveling accuracy is improved, but device complexity increases
Solution Approach 1:
The patent applies self-service by having the memory sub-system automatically perform capability metric measurements and adaptive wear leveling adjustments without external intervention. The controller autonomously measures die capabilities, assigns appropriate capability bins, and adjusts wear distribution, eliminating the need for complex external measurement and control systems.
Solution Approach 2:
The patent implements feedback by using measured capability metrics to continuously adjust wear leveling operations. The system measures die capability, uses this feedback to determine appropriate program/erase cycle distribution, and monitors the results to maintain optimal wear balance, creating a closed-loop control system that manages complexity through intelligent feedback mechanisms.
Data Source
AI summary
A first blocks of a set of blocks of a memory device is identified. A die on which the first block resides is identified among a plurality of dies of the memory device. A threshold value associated with the die is selected from a range associated with a projected reliability metric of the die. Responsive to determining that an endurance metric value associated with the die matches the threshold value, a program operation is performed with respect to a second block of the set of blocks.


