Adaptive Wear-Leveling for NAND Flash Sub-Blocks
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing wear leveling algorithms in NAND flash memory devices fail to maintain data reliability between sub-blocks, as the program-erase count (PEC) difference between sister sub-blocks can exceed threshold values, leading to data reliability issues.
Innovation Solution
Implementing a wear leveling operation that calculates a sister sub-block threshold and prioritizes the allocation of a sister sub-block with a lower PEC value for multi-layer cell (MLC) flows, thereby reducing the PEC difference between sister sub-blocks and maintaining data reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If existing wear leveling algorithm is used to distribute PE cycles among blocks, then overall memory device lifespan is extended, but PEC difference between sister sub-blocks exceeds threshold leading to data reliability issues
Solution Approach 1:
The patent segments the wear leveling process at the sub-block level rather than treating entire blocks uniformly. By dividing blocks into sister sub-blocks and managing them independently with separate PEC tracking, the system can apply differentiated wear leveling strategies to each sub-block, preventing excessive PEC differences while extending overall device lifespan.
Solution Approach 2:
The patent applies local quality by treating each sister sub-block differently based on its individual PEC value and operational characteristics. The controller monitors and manages each sub-block's wear status independently, allocating MLC flows and executing wear leveling operations tailored to specific sub-block conditions rather than applying uniform policies across all blocks.
2Productivity
If data is moved from source block to destination block using existing wear leveling algorithm, then wear is distributed across blocks, but sister sub-block of source block cannot be allocated for MLC flow reducing wear leveling effectiveness
Solution Approach 1:
The patent implements dynamic allocation strategies where the controller flexibly assigns MLC flows to sister sub-blocks based on real-time PEC values and operational needs. The system can dynamically switch between different allocation patterns (sequential vs. parallel MLC flows) and adaptively select which sub-block receives MLC flow allocation to optimize wear leveling effectiveness.
Solution Approach 2:
The patent changes the allocation parameters by considering PEC values, sub-block operational status, and flow type when assigning MLC flows. The controller adjusts allocation decisions based on varying parameters such as PEC threshold differences, sub-block availability, and workload characteristics to maximize wear leveling efficiency.
3Ease of operation
If sub-blocks are erased and programmed individually to enable independent access, then access flexibility is improved, but data disturbance accumulates in sister sub-blocks requiring frequent refreshes
Solution Approach 1:
The patent implements feedback mechanisms where the controller continuously monitors PEC values and disturbance levels in sister sub-blocks. Based on this feedback, the controller adjusts wear leveling operations, MLC flow allocations, and refresh schedules to prevent disturbance accumulation while maintaining independent access capability. The system responds to real-time conditions to balance accessibility with data reliability.
Data Source
AI summary
A storage device may maintain data reliability between sub-blocks by executing wear leveling operations such that a program-erase count (PEC) difference between sister sub-blocks is reduced. The storage device may include a memory device including blocks, and at least one of the blocks may be divided into sister sub-blocks. The storage device may also include a controller to calculate a sister sub-block threshold and process a wear leveling operation. When executing the wear leveling operation, the controller may select a destination block. The controller may also prioritize a first sister block for a multi-layer cell (MLC) flow when the PEC value of a second sister sub-block is greater than the sister sub-block threshold.


