ADAS Boot Loader Adaptive Memory Pre-training

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Solution Overview

Problem

Advanced driver assist systems in vehicles require fast and reliable booting with adaptive memory re-training to handle extreme temperatures and extended life cycles, while existing memory training processes are time-consuming and inefficient.

Innovation Solution

An advanced driver assist system (ADAS) with a safety microcontroller manages power and reset, allowing for fast booting using pre-trained memory parameters and adaptive memory re-training, reducing boot time from 15 seconds to 100 milliseconds, and enabling continuous system reliability through adaptive memory management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If full memory training is performed during each boot process, then memory reliability is improved, but boot time increases significantly

Engineering Contradiction:
Improvememory reliabilityVSAvoidboot time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by performing complete memory training once during manufacturing or initial setup, then storing the trained parameters in non-volatile memory. During subsequent boot operations, the system loads these pre-trained parameters directly, eliminating the need to repeat the full training process. This resolves the contradiction by preparing memory parameters in advance, achieving both fast boot times and reliable memory operation without repeated training.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses copying by creating a copy of the trained memory parameters and storing them in non-volatile memory (such as flash memory or EEPROM). Instead of re-training memory during each boot, the system copies the essential parameter data from the original training session and reuses it. This copying mechanism allows the system to maintain memory reliability while dramatically reducing boot time, as copying data is much faster than performing full memory training.

Inventive Principle:
Principle #26Copying

2Adaptability or versatility

If memory parameters are re-trained during each boot, then adaptability to environmental changes is improved, but system productivity decreases

Engineering Contradiction:
Improveadaptability to environmental changesVSAvoidsystem productivity
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent implements periodic action by scheduling memory re-training to occur at specific intervals rather than at every boot. The system monitors usage patterns, temperature conditions, and error rates, then triggers re-training only when environmental conditions warrant it or when a predetermined time interval has elapsed. This periodic approach maintains adaptability to environmental changes while preserving system productivity by avoiding unnecessary re-training operations during normal operation.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent applies dynamics by making the memory training process adaptive and condition-based rather than static and routine. The system dynamically adjusts whether to perform full training, partial training, or use cached parameters based on real-time conditions such as temperature extremes, voltage variations, detected errors, and operational history. This dynamic approach optimizes the balance between adaptability and productivity by applying training only when environmentally necessary.

Inventive Principle:
Principle #15Dynamics

3Measurement precision

If complete memory training is performed, then memory parameter accuracy is improved, but processing speed during boot decreases

Engineering Contradiction:
Improvememory parameter accuracyVSAvoidboot speed
Core Design Contradiction:
Measurement precisionVSSpeed

Solution Approach 1:

The patent applies segmentation by dividing the memory training process into distinct phases: a complete initial training phase performed once to establish accurate parameters, and subsequent accelerated phases that load only essential parameters from non-volatile storage. The segmentation allows the system to achieve high parameter accuracy during the initial comprehensive training while maintaining fast boot speeds in subsequent operations by skipping redundant training steps and directly loading the segmented parameter sets.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses partial action by performing complete memory training once to ensure full parameter accuracy, then using only the essential portion of those trained parameters for subsequent rapid boots. The system loads a subset of critical parameters from non-volatile memory rather than repeating the full training sequence, achieving sufficient accuracy for normal operation while dramatically improving boot speed. Partial re-training may be performed intermittently to refresh parameters without the overhead of complete training.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS10216550B2Technologies for fast boot with adaptive memory pre-training
Publication Date: 2019.02.26 INTEL CORP
  • US10216550B2 patent drawing
  • US10216550B2 patent drawing
  • US10216550B2 patent drawing

AI summary

Technologies for an advanced driver assist system (ADAS) with adaptive memory pre-training include a computing device and a safety microcontroller in communication with a serial link and a general-purpose I/O (GPIO) link. Out of reset, the computing device determines whether a full memory training signal is raised via the GPIO link. If not raised, the computing device executes a fast boot path to initialize a memory controller with a pre-trained memory parameter data set and performs margin tests to check the validity of the pre-trained memory parameter data set. If the full memory training signal is raised, the computing device executes a slow boot path to generate the pre-trained memory parameter data set. The safety microcontroller may receive a message requesting full memory training via the serial link and, in response, hold the computing device in reset and raise the full memory training signal. Other embodiments are described and claimed.