High-Resolution ADC Bandwidth Extension via Quantization Noise Subtraction
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Solution Overview
Problem
Prior art analog to digital converters (ADCs) are highly consumptive of power and provide relatively low resolution, making them unsuitable for many applications that require high performance and accurate signal conversion.
Innovation Solution
The development of novel ADC designs and architectures that enable high-resolution digital format data conversion with reduced power consumption, allowing for simultaneous driving and sensing of analog signals via a single line, and incorporating features like decimation filters and non-linear N-bit digital to analog converters to enhance performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If prior art ADC designs are used, then device complexity is reduced, but measurement precision and resolution deteriorate
Solution Approach 1:
The ADC is divided into multiple parallel sub-ADCs (first and second ADCs) that simultaneously process different portions of the analog input signal. Each sub-ADC converts a portion of the input signal to digital format, and their outputs are combined through logic circuitry to achieve high-resolution conversion. This segmentation allows the system to achieve high measurement precision without requiring a single overly complex ADC design.
2Use of energy by moving object
If prior art ADC designs are used, then ease of manufacture is improved, but use of energy deteriorates
Solution Approach 1:
The ADC operates in periodic phases including a first phase where the first sub-ADC converts a first portion of the analog input signal, and a second phase where the second sub-ADC converts a second portion of the analog input signal. This periodic operation allows the system to achieve high-resolution conversion with reduced power consumption compared to traditional single-ADC designs, as each sub-ADC can be optimized for specific operating conditions and phases.
3Measurement precision
If prior art ADC designs are used, then bandwidth is sufficient, but measurement precision deteriorates
Solution Approach 1:
The input signal is segmented into multiple portions that are simultaneously processed by parallel sub-ADCs. This segmentation in the signal processing domain allows the system to achieve high resolution without sacrificing bandwidth, as multiple conversions occur in parallel rather than sequentially.
Solution Approach 2:
The patent introduces a new dimension of signal processing by using parallel multiple-input multiple-output (MIMO) paths. Instead of processing signals through a single conversion path, the system uses multiple independent conversion paths that operate simultaneously, effectively adding a spatial dimension to the conversion process and achieving both high resolution and high bandwidth.
Data Source
AI summary
A high resolution analog to digital converter (ADC) with improved bandwidth senses an analog signal (e.g., a load current) to generate a digital signal. The ADC operates based on a load voltage produced based on charging of an element (e.g., a capacitor) by a load current and a digital to analog converter (DAC) output current (e.g., from a N-bit DAC). The ADC generates a digital output signal representative of a difference between the load voltage and a reference voltage. This digital output signal is used directly, or after digital signal processing, to operate an N-bit DAC to generate a DAC output current that tracks the load current. In addition, quantization noise is subtracted from the digital output signal thereby extending the operational bandwidth of the ADC. In certain examples, the operational bandwidth of the ADC extends up to 100s of kHz (e.g., 200-300 kHz), or even higher.