ADC Built-In Self-Test Using Sigma-Delta Feedback Loop
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Solution Overview
Problem
High precision Analog-to-Digital Converters (ADCs) in semiconductor devices require lengthy and costly testing due to high precision Automatic Test Equipment (ATE) and complex signal routing, limiting production efficiency and increasing costs.
Innovation Solution
A Built-In-Self-Test (BIST) circuit utilizing a second ADC on the same semiconductor chip, specifically a Sigma-Delta (ΣΔ) ADC in a feedback loop with a Successive Approximation Register (SAR) ADC, generates an analog input voltage internally, allowing for reduced test time and minimal additional components, eliminating the need for external ATE hardware.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If high precision ADC testing is performed using traditional ATE hardware with multiple signal routing, then measurement precision is improved, but device complexity and production cost increase
Solution Approach 1:
The patent implements a built-in self-test function where the ADC under test generates its own test signals through an integrated voltage generator and uses its own resources for measurement. This eliminates the need for external ATE hardware and complex signal routing, while maintaining measurement precision through on-chip characteristic curve sampling and analysis
Solution Approach 2:
The patent creates a multi-functional test system that can perform multiple ADC characteristic measurements (linearity, offset, gain) using a single integrated test circuit. The voltage generator can produce various test signals, and the same circuitry handles both signal generation and measurement, reducing overall device complexity while maintaining comprehensive testing capability
2Measurement precision
If high precision ADC testing is performed with multiple signal routing, then measurement precision is improved, but production cost increases
Solution Approach 1:
By implementing built-in self-test functionality, the patent eliminates expensive external ATE hardware requirements. The ADC module tests itself using on-chip resources, significantly reducing production test equipment costs while maintaining measurement precision through integrated voltage generation and characteristic curve analysis
Solution Approach 2:
The patent extracts the test signal generation function from external ATE hardware and integrates it directly into the ADC module. This extraction eliminates the need for expensive external equipment while maintaining measurement precision through on-chip voltage generation and characteristic curve sampling
3Measurement precision
If ADC testing uses traditional methods with lengthy measurements, then measurement precision is improved, but productivity decreases
Solution Approach 1:
The patent performs preliminary setup of test conditions on-chip by integrating the voltage generator and test signal sources directly in the ADC module. This preliminary integration eliminates time-consuming external setup and signal routing during production testing, maintaining precision while improving productivity through faster test execution
Solution Approach 2:
The built-in self-test capability allows the ADC to autonomously perform characteristic curve sampling and analysis without external intervention. This self-service approach maintains measurement precision while significantly reducing test time and improving production throughput by eliminating external equipment bottlenecks
Data Source
AI summary
A semiconductor chip with a built-in-self-test circuit including a first analog-to-digital converter (ADC) configured to convert an analog input voltage signal received at its input into a digital output voltage signal that characterizes the first ADC; and a second ADC coupled to the input of the first ADC and configured to convert the analog input voltage signal received at its input to a digital feedback voltage signal, wherein the analog input voltage signal is generated based on the digital feedback signal.