ADC Built-In Self-Test Using Idle Conversion Cycles
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing methods for testing analog-to-digital converters lack efficient in-field testing capabilities, particularly in safety-critical applications like autonomous driving, where traditional manufacturing tests do not ensure continuous functionality and accuracy during normal operation.
Innovation Solution
The implementation of built-in self-test (BIST) circuitry within the analog-to-digital converter, which monitors idle states to initiate tests without disrupting normal operation by sharing conversion cycles and using time multiplexing techniques to execute self-tests during idle periods, ensuring continuous functionality and performance analysis.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional manufacturing tests are used for analog-to-digital converters, then initial functionality can be verified, but continuous in-field testing capability is lacking
Solution Approach 1:
The patent merges the test signal generator with the normal signal input path and integrates test control logic within the existing ADC architecture. The multiplexer combines normal input signals and test signals into a single input path, allowing the ADC to be tested without adding separate external testing equipment, thus verifying continuous functionality while minimizing additional system complexity.
Solution Approach 2:
The ADC and associated circuitry are designed to perform both normal conversion operations and self-testing functions using the same hardware resources. The signal generator can produce both normal input signals and test patterns, the ADC processes both normal and test signals, and the same output path handles both conversion results and test results, enabling continuous in-field testing without dedicated separate testing components.
2Reliability
If self-test operations are performed during normal operation, then continuous monitoring is achieved, but disruption of normal conversion cycles occurs
Solution Approach 1:
The system implements periodic self-testing by monitoring for idle states and initiating test sequences during these periods. The test controller detects when the ADC is not processing normal signals and schedules test signal generation and conversion during these idle windows, allowing real-time verification without disrupting ongoing conversion cycles. Tests are performed periodically rather than continuously, maintaining productivity while achieving reliability monitoring.
Solution Approach 2:
The testing system dynamically adapts its operation based on the ADC's state. The test controller continuously monitors the ADC's busy/idle status and dynamically schedules test operations accordingly. When the ADC is busy with normal conversions, testing is suspended; when idle, testing is initiated. This dynamic scheduling allows real-time verification while minimizing impact on conversion cycle efficiency.
3Ease of manufacture
If test signal generation is integrated within the converter, then external testing equipment is eliminated, but internal circuit complexity increases
Solution Approach 1:
The signal generator is designed to produce multiple types of signals including normal input signals and various test patterns using the same circuitry. The multiplexer is configured to route both normal signals from external sources and test signals from the integrated generator to the ADC input through a single path, simplifying the overall architecture while enabling comprehensive testing without significant internal circuit complexity increases.
4Productivity
If conversion rate is increased to accommodate BIST operations, then more test cycles are available, but power consumption increases
Solution Approach 1:
Instead of continuously operating at high conversion rates, the system performs testing periodically during idle states. The ADC operates at its normal conversion rate during active periods and performs test conversions at the same rate during idle periods. This approach provides sufficient test cycles without requiring sustained high-power operation, thereby avoiding increased power consumption while maintaining productivity.
Data Source
AI summary
Analog-to-digital conversion is tested in-field using an on-chip built-in self-test (BIST) sub-circuit formed within an underlying integrated circuit. Processing cycles may be conscripted during an idle state when the analog-to-digital conversion is not needed. The BIST requires a test time which may be compared to an idle time. If the idle time exceeds the test time, then the BIST may be entirely performed. However, if the idle time is unknown or less than the test time, the BIST may be paused and resumed between subsequent idle states.