High-Impedance ADC Buffer Loop for Low-Power Digital Microphones
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Solution Overview
Problem
Existing digital microphones face challenges in efficiently converting high input impedance signals with low power consumption, particularly in the integration of buffering and analog-to-digital conversion processes.
Innovation Solution
The integration of a high input impedance source follower buffer with an ADC, forming a noise shaping loop, reduces noise requirements and allows for lower power operation by maintaining a constant buffer current, thereby improving power efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a separate buffering circuit is used to reduce load on MEMS device, then input signal buffering is improved, but device complexity and power consumption increase
Solution Approach 1:
The patent combines the buffering function and ADC conversion function into a single integrated circuit. The input transistor serves as both the buffer (source follower) and the input stage of the ADC, eliminating the need for a separate buffering circuit. This merging reduces device complexity while maintaining the buffering capability to reduce load on the MEMS device.
2Ease of operation
If a separate buffering circuit is used to reduce load on MEMS device, then input signal buffering is improved, but power consumption increases
Solution Approach 1:
The patent merges the buffer and ADC into one integrated circuit, eliminating redundant circuitry. The single transistor design provides both buffering and conversion functions, reducing the total power consumption compared to having separate buffering and conversion circuits operating independently.
3Measurement precision
If noise shaping loop is implemented with integrated buffer and ADC, then noise requirements in loop filter are reduced, but circuit design complexity increases
Solution Approach 1:
The integration of buffer and ADC creates a unified noise shaping loop where the buffer current serves dual purposes: maintaining high input impedance and providing the conversion current. This unified design simplifies the noise requirements for the loop filter while the constant current technique maintains design simplicity.
Solution Approach 2:
The patent uses a constant buffer current that is maintained throughout operation. This parameter control technique stabilizes the operating point and reduces noise variations, allowing the loop filter to operate with reduced noise requirements while keeping the circuit design manageable.
4Use of energy by moving object
If constant buffer current is used to maintain high input impedance, then power efficiency is improved, but signal handling flexibility is reduced
Solution Approach 1:
The patent employs a constant buffer current as a fixed parameter to achieve high power efficiency. This constant current maintains the high input impedance characteristic while the integrated ADC portion handles signal conversion, providing adequate signal handling capability for the intended application without requiring current variability.
Data Source
AI summary
An electronic system is disclosed. The electronic system includes an input transistor having a source configured to receive an analog input signal; a filter having an input coupled to an output node of the input transistor; an ADC having an input coupled to an output of the filter and an output configured to provide a digital signal representative of the analog input signal; and a DAC having an input coupled to the output of the ADC and an output configured to provide a current to the source of the input transistor.