Sigma-Delta ADC Buffer Offset Modulation Without Large Capacitors
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Solution Overview
Problem
Sigma-delta analog digital converters (ADCs) face challenges due to buffer offsets, which distort their output curves and are difficult to mitigate without increasing circuit area or requiring high power and large capacitors.
Innovation Solution
The implementation of buffer offset modulation, where the polarity of buffer offsets is rotated and filtered using a digital low-pass filter, allowing only low-frequency signals to pass through, effectively canceling out the buffer offsets.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a switched capacitor is used to store the buffer offset, then the buffer offset is mitigated, but additional power and large capacitors are required
Solution Approach 1:
The patent replaces the traditional switched capacitor mechanism with a digital signal processing approach. Instead of using physical capacitors to store and cancel offset voltages, the system uses a sigma-delta ADC to oversample the buffer output and digitally filter the offset components. This substitution of mechanical/electrical storage with digital processing eliminates the need for large capacitors and reduces power consumption while maintaining offset mitigation effectiveness.
2Measurement precision
If a switched capacitor is used to store the buffer offset, then the buffer offset is mitigated, but large capacitors are required
Solution Approach 1:
The patent replaces the physical capacitor storage mechanism with digital oversampling and filtering. The sigma-delta ADC captures the buffer output at a high sampling rate, and the digital filter subsequently removes the offset frequency components. This approach eliminates the need for large physical capacitors, thereby reducing circuit area while achieving the same offset mitigation goal.
3Measurement precision
If a switched capacitor is used to store the buffer offset, then the buffer offset is mitigated, but the implementation becomes difficult
Solution Approach 1:
The patent replaces the complex switched capacitor circuitry with a sigma-delta ADC and digital filtering system. This substitution simplifies the analog circuit design by moving the offset mitigation function to the digital domain, where it can be implemented through standard oversampling and digital filtering techniques, thereby reducing implementation difficulty.
Solution Approach 2:
The patent employs periodic oversampling at a high frequency followed by digital filtering at the Nyquist frequency. This periodic sampling and filtering approach provides a systematic and easily implementable method for offset mitigation, avoiding the complexity of switched capacitor timing and synchronization requirements.
4Measurement precision
If a switched capacitor is used to store the buffer offset, then the buffer offset is mitigated, but high driving input signal is required
Solution Approach 1:
The patent replaces the high-power switched capacitor approach with a low-power sigma-delta ADC and digital filtering system. The oversampling process captures the signal with high resolution, and the digital filter removes offset components without requiring high driving input signals, thereby reducing power consumption while maintaining offset mitigation effectiveness.
Data Source
AI summary
One or more techniques for buffer offset modulation or buffer offset cancelling are provided herein. In an embodiment, an output for a sigma-delta analog digital converter (ADC) is provided using an output of a first chop-able buffer (FB) and an output of a second chop-able buffer (SB). For example, the output of the FB is associated with a first offset, the output of the SB is associated with a second offset, and the output of the ADC includes an ADC offset associated with the first offset and the second offset. In an embodiment, buffer offset modulation is provided by modulating the ADC offset using an offset rotation. In an example, the offset rotation is based at least in part on a reference clock and the output of the ADC. The buffer offset modulation mitigates the first offset or the second offset, where such offsets are generally undesired.