Time-Interleaved ADC Calibration Using Coprime Bitstream Patterns

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Solution Overview

Problem

Time-interleaved analog-to-digital converters (ADCs) face challenges in calibration due to mismatches between channels, particularly timing skew, which is difficult to detect and correct, leading to accumulative errors and spectral corruption.

Innovation Solution

A signal generator is used to produce a bitstream with a specific bit pattern that shares no common factor with the number of channels, combining a lower frequency component with a higher frequency component, allowing for accurate estimation and correction of mismatches, including timing skew, using a waveform generator integrated on the same IC as the ADC.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a time-interleaved ADC uses multiple parallel sub-ADCs to increase sampling rate, then the sampling rate is increased m times, but timing skew and channel mismatches cause accumulative errors and spectral corruption

Engineering Contradiction:
Improvesampling rateVSAvoidtiming accuracy
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies preliminary action by performing calibration of timing skew and channel mismatches before the actual ADC operation. A calibration signal is generated and processed through the time-interleaved ADC to measure timing offsets, and correction values are calculated in advance to compensate for these errors during normal operation, thereby maintaining high sampling rates while ensuring timing accuracy.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If traditional calibration methods are used for time-interleaved ADCs, then channel mismatches can be partially corrected, but timing skew detection and correction remain difficult and complex

Engineering Contradiction:
Improvecalibration accuracyVSAvoidcalibration system complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies universality by designing a calibration signal generator that can produce multiple types of calibration signals (e.g., single-tone, multi-tone, spread-spectrum) using a single integrated circuit block. This multi-functional approach enables comprehensive calibration of both timing skew and channel mismatches without requiring separate dedicated circuits for each calibration function, thereby reducing overall system complexity while maintaining high measurement precision.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent introduces an intermediary calibration signal as a mediator between the test equipment and the ADC channels. This calibration signal passes through all sub-ADCs and carries information about timing skew and channel mismatches, which are then extracted and used to generate correction values. The intermediary signal simplifies the measurement process by encoding multiple error types into a single measurable waveform.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Measurement precision

If calibration is performed externally, then accurate measurements can be obtained, but the calibration process requires additional external equipment and increases system complexity

Engineering Contradiction:
Improvecalibration measurement accuracyVSAvoidcalibration equipment
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies self-service by implementing an on-chip calibration signal generator that is integrated within the ADC itself. This self-calibration capability eliminates the need for external calibration equipment, allowing the ADC to perform its own timing skew and channel mismatch calibration using internally generated test signals, thereby reducing external equipment requirements while maintaining measurement precision.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS10312927B1Calibration for time-interleaved analog-to-digital converters and signal generators therefor
Publication Date: 2019.06.04 QUALCOMM INC
  • US10312927B1 patent drawing
  • US10312927B1 patent drawing
  • US10312927B1 patent drawing

AI summary

Certain aspects of the present disclosure provide methods and apparatus for calibrating time-interleaved analog-to-digital converter (ADC) circuits and generating a suitable signal for such calibration. Certain aspects provide a signal generator for calibrating a time-interleaved ADC circuit having a plurality of channels. The signal generator generally includes a pattern generator configured to receive a periodic signal and to output a bitstream based on the periodic signal and a conversion circuit having an input coupled to an output of the pattern generator and configured to generate a waveform based on the bitstream. The bitstream has a bit pattern with a total number of bits that shares no common factor with a number of the channels and includes a relatively lower frequency component combined with a relatively higher frequency component.