ADC Reference Charge Cancellation for Stable Voltage Settling
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Solution Overview
Problem
Analog-to-digital converters (ADCs) face challenges with large reference buffer capacitors required for accurate signal conversion, leading to significant area and power consumption due to reference kickback or 'hits' during high-speed data transfer, which complicates the handling of signal-dependent and signal-independent settling.
Innovation Solution
The implementation of charge cancellation capacitors that adjust charge on bypass capacitors to compensate for reference hits, allowing for smaller capacitors and reduced power consumption by pre-charging them to different voltages or using current sources/sinks for optimal charge cancellation, thereby minimizing reference hits and settling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If large reference buffer capacitors are used to maintain accurate reference voltages during high-speed data transfer, then signal conversion accuracy is improved, but area consumption and power consumption increase significantly
Solution Approach 1:
The patent applies preliminary action by pre-charging cancellation capacitors to specific voltages before reference hits occur. These pre-charged capacitors are then switched in to cancel the reference kickback voltage hits on the reference buffer capacitors, preventing accuracy degradation without requiring oversized capacitors. This proactive charge cancellation allows the use of smaller reference buffer capacitors while maintaining signal conversion accuracy.
Solution Approach 2:
The patent implements preliminary anti-action by introducing cancellation capacitors that are pre-charged to voltages opposite to the expected reference hit polarity. When reference kicks occur during high-speed operation, these pre-charged capacitors are switched in to counteract and cancel the harmful voltage hits, preventing reference voltage excursions without requiring larger buffer capacitors.
2Stability of the object's composition
If large reference buffer capacitors are used to compensate for reference hits, then reference voltage stability is improved, but power consumption increases
Solution Approach 1:
The patent applies preliminary action by pre-charging cancellation capacitors to specific voltages before reference hits occur. These pre-charged capacitors are then switched in to cancel the reference kickback voltage hits on the reference buffer capacitors, preventing accuracy degradation without requiring oversized capacitors. This proactive charge cancellation allows the use of smaller reference buffer capacitors while maintaining signal conversion accuracy.
Solution Approach 2:
The patent changes the voltage parameters of cancellation capacitors dynamically. Different cancellation capacitors are pre-charged to different voltages (e.g., 0V, Vref/2, Vref) and switched in based on the specific reference hit conditions. This parameter variation enables precise cancellation of reference hits with smaller capacitors, reducing both area and power consumption while maintaining reference voltage stability.
3Productivity
If high-speed data transfer is implemented, then productivity is improved, but reference kickback effects worsen
Solution Approach 1:
The patent implements feedback by monitoring the state of reference buffer capacitors during high-speed operation and dynamically switching in cancellation capacitors with appropriate pre-charged voltages to counteract reference kickback. This feedback mechanism enables high-speed data transfer while actively compensating for the harmful reference hits that worsen at higher speeds, maintaining signal integrity without sacrificing productivity.
Solution Approach 2:
The patent implements preliminary anti-action by introducing cancellation capacitors that are pre-charged to voltages opposite to the expected reference hit polarity. When reference kicks occur during high-speed operation, these pre-charged capacitors are switched in to counteract and cancel the harmful voltage hits, preventing reference voltage excursions without requiring larger buffer capacitors.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces the size and power requirements of ADCs, enhancing linearity and accuracy, especially in high-speed circuits, by minimizing reference hits and settling, and improving the stability of reference voltages.
Implementation Method 1
cancellation capacitors with different voltages stored thereon
Data Source
AI summary
An analog-to-digital converter (ADC) includes reference charge cancellation features to at least partially offset a voltage distortion on a bypass capacitor of a reference buffer due to a voltage reference hit taken by a switched capacitor bank with which the bypass capacitor is connected. The charge cancellation may be configured in logic to be input signal dependent because different resolved bits or transitions between resolved bits may cause different amounts of voltage reference hits. By adjusting the bypass capacitor in response to each of at least some of the reference hits while resolving a word of bits, the reference voltage signal provided by the bypass capacitor undergoes far less settling, remaining more stable and linear for a more accurate reference voltage. Furthermore, a smaller capacitor may be used for the bypass capacitor, reducing power consumption and area on chip.