ADC Charge Compensation Circuit for Reference Voltage Stability

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Solution Overview

Problem

Analog-to-digital converters face reliability issues due to voltage drops caused by discharging paths from reference voltage to ground, degrading the stability of the reference voltage during conversion processes.

Innovation Solution

A charge compensation circuit is introduced, comprising capacitors and logic circuits that adjust voltages at their terminals based on control signals generated from output bits of the ADC, using buffers and XOR gates to stabilize the reference voltage through negative feedback mechanisms.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If discharging paths are present from reference voltage to ground during conversion process, then the ADC can perform analog-to-digital conversion, but the reference voltage experiences voltage-drop and reliability degrades

Engineering Contradiction:
Improvereference voltage reliabilityVSAvoidvoltage-drop
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent converts the harmful discharging paths into beneficial charging paths by using the same switch nodes and capacitor structures to supply compensating charge back to the reference voltage node, transforming the voltage-drop problem into a self-compensating mechanism

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The patent implements a feedback mechanism where the compensation charge is dynamically adjusted based on the conversion results from the ADC, using the output bits to control the amount of charge supplied to the reference voltage node through the logic circuit

Inventive Principle:
Principle #23Feedback

2Stability of the object's composition

If reference voltage is used for conversion process, then the ADC can operate, but the reference voltage stability degrades due to discharging paths

Engineering Contradiction:
Improvereference voltage stabilityVSAvoidconversion process reliability
Core Design Contradiction:
Stability of the object's compositionVSReliability

Solution Approach 1:

The patent transforms the unstable discharging behavior into a stable reference voltage by using the switch nodes to both discharge during conversion and charge during compensation, with the net effect stabilizing the reference voltage node

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The patent recovers the charge that would otherwise be lost through discharging paths by capturing it at the switch nodes and redistributing it back to the reference voltage node, effectively recycling the charge that would degrade reference stability

Inventive Principle:
Principle #34Discarding and recovering

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed solution effectively stabilizes the reference voltage, enhancing the reliability and accuracy of the analog-to-digital conversion process by compensating for voltage variations caused by switching operations.

Implementation Method 1

a first capacitor having a first terminal and a second terminal, the first terminal being coupled to a reference voltage

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

The first logic circuit adjusts a voltage at a second terminal of the first capacitor according to a first control signal

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentEP3258600B1Charge compensation circuit and analog-to-digital converter with the same
Publication Date: 2020.04.01 MEDIATEK INC
  • EP3258600B1 patent drawingFigure 1
  • EP3258600B1 patent drawingFigure 2
  • EP3258600B1 patent drawingFigure 3

AI summary

A charge compensation circuit for use in an analog-to-digital converter (ADC) includes at least one capacitor and at least one logic circuit. A first terminal of the capacitor is coupled to a reference voltage of the analog-to-digital converter. The logic circuit is configured to adjust a voltage at a second terminal of the capacitor according to a control signal. The control signal is determined according to at least one output bit from the analog-to-digital converter.