ADC Clock Selection for Transceiver Aliasing Mitigation

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Solution Overview

Problem

In radio frequency transceivers, alias responses caused by transmit leakage overwhelm the weak wanted signal component, disrupting reception due to finite attenuation and parasitic coupling, and designing ADCs to handle parameter variations is challenging, leading to inefficient operation.

Innovation Solution

Determine the maximum conversion rate of the analog-to-digital converter based on temperature and frequency of unwanted signal components, selecting a conversion rate that places alias responses in a non-overlapping frequency range with the wanted signal, and configuring the analog filter as a lower order filter to mitigate aliasing effects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the ADC conversion rate is increased to place alias responses in non-overlapping frequency ranges, then aliasing effects are reduced and signal reception quality is improved, but the ADC may fail to operate correctly under parameter variations such as temperature changes

Engineering Contradiction:
Improvesignal reception qualityVSAvoidADC operation reliability
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent implements dynamic conversion rate selection by determining the maximum conversion rate at runtime based on temperature and unwanted signal frequency, then selecting an appropriate conversion rate from available rates that does not exceed the maximum. This allows the system to adapt to parameter variations while maintaining reliable operation.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operating parameters of the ADC by selecting from multiple available conversion rates based on determined maximum conversion rate and unwanted signal frequency. This parameter adaptation allows the system to optimize signal reception quality while ensuring reliable ADC operation under varying conditions.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the ADC conversion rate is reduced to ensure reliable operation under parameter variations, then ADC reliability is improved, but alias responses overlap with wanted signal components and disrupt reception

Engineering Contradiction:
ImproveADC operation reliabilityVSAvoidsignal reception quality
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The system dynamically adjusts the conversion rate based on determined maximum conversion rate and unwanted signal frequency rather than using a fixed conservative rate. This dynamic adjustment ensures reliable operation while maximizing signal reception quality by selecting the highest appropriate conversion rate.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent optimizes the conversion rate parameter by selecting from available rates based on runtime determination of maximum conversion rate and unwanted signal frequency. This parameter optimization resolves the contradiction by finding the best conversion rate that ensures reliability while minimizing aliasing effects.

Inventive Principle:
Principle #35Parameter changes

3Object-affected harmful factors

If a higher order analog filter is used to increase stop-band attenuation, then aliasing effects are reduced, but power consumption and filter sensitivity to process and temperature variations increase

Engineering Contradiction:
Improvealiasing effectsVSAvoidpower consumption
Core Design Contradiction:
Object-affected harmful factorsVSUse of energy by moving object

Solution Approach 1:

The patent converts the potentially harmful aliasing effects into manageable signals by using digital signal processing to identify and remove alias components after ADC conversion. This approach replaces the need for high-order analog filters with digital processing, reducing power consumption and filter sensitivity issues.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The patent substitutes the mechanical/analog filtering approach with digital signal processing methods. Instead of relying on complex analog filter hardware to reject aliasing, the system uses digital processing to identify and remove alias components, thereby reducing power consumption and sensitivity to process and temperature variations.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

4Object-affected harmful factors

If the analog filter is designed with higher stop-band attenuation to reject unwanted signals, then aliasing is reduced, but the filter becomes more sensitive to process and temperature variations

Engineering Contradiction:
Improvealiasing effectsVSAvoidfilter sensitivity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent replaces the sensitive analog filter design with digital signal processing methods that are less sensitive to process and temperature variations. By using digital processing to identify and remove alias components after conversion, the system avoids the sensitivity issues inherent in high-order analog filters.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent transforms the aliasing problem from an analog filtering challenge into a digital signal processing task. By allowing aliasing to occur and then using digital methods to identify and remove the alias components based on known unwanted signal frequencies, the system reduces filter sensitivity and complexity.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively mitigates alias responses, improving signal reception quality while maintaining low power consumption and ensuring reliable operation across varying parameter conditions.

Implementation Method 1

alias responses caused by transmit leakage overwhelm the weak wanted signal component

Methodology Applied
Scientific EffectAliasing:

Implementation Method 2

the resulting filtered baseband signal is sampled by analog-to-digital converter at a conversion rate, resulting in a sampled signal

Methodology Applied
Scientific EffectSampling:

Implementation Method 3

Temperature compensation unit may comprise a temperature sensor that can be queried through bus interface, and offset circuitry for reference crystal oscillator that can be controlled through bus interface

Methodology Applied
Scientific EffectTemperature compensation:

Implementation Method 4

Reference clock may be generated by a reference crystal oscillator

Methodology Applied
Scientific EffectPiezoelectric effect: Piezoelectric Effect

Implementation Method 5

receive path mixer may implement quadrature down-conversion using a pair of mixers, providing an in-phase and a quadrature component of baseband signal

Methodology Applied
Scientific EffectFrequency mixing:

Data Source

PatentUS8553748B2ADC clock selection based on determined maximum conversion rate
Publication Date: 2013.10.08 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US8553748B2 patent drawing
  • US8553748B2 patent drawing
  • US8553748B2 patent drawing

AI summary

The present invention introduces a method, an apparatus and a computer program product for mitigating effects of alias responses in a transceiver, by selecting a clock rate for an analog-to-digital converter based on a determined maximum conversion rate of the ADC. The selected conversion rate places an alias response of the unwanted signal component to a frequency range which is substantially non-overlapping with a wanted signal component of the receiver. Furthermore, a temperature of the transceiver may be measured e.g. by a temperature compensation unit of a reference oscillator. Furthermore, a data table may be used by a processing unit for linking temperatures with maximum conversion rates of the analog-to-digital converter. The method is implemented in the processing unit of the transceiver which is further configured to execute the operations of the corresponding computer program product according to the invention.