ADC Capacitor Array Coding for Improved Conversion Linearity
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Solution Overview
Problem
Precision analog-to-digital converters face challenges in achieving high linearity due to capacitor mismatch errors, which can result in nonlinearity and deviation from desired statistical properties, especially in applications requiring accurate conversion of analog signals.
Innovation Solution
The proposed ADC method involves deriving a first code to approximate the combination of an analog input value and a dither value, then deriving a second code to represent the residue, and combining these codes to improve linearity by applying them to a capacitor array, thereby reducing the impact of capacitor mismatch errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional ADC methods are used, then the conversion process is simple, but linearity and accuracy deteriorate due to capacitor mismatch errors
Solution Approach 1:
The ADC conversion process is segmented into multiple stages: a coarse conversion stage that produces a first code, followed by a refinement stage that produces a second code. The capacitor array is also segmented into multiple groups that are selectively activated. This segmentation allows the system to achieve high linearity through the combined effect of multiple simpler conversion steps rather than requiring a single complex high-precision conversion.
Solution Approach 2:
The invention performs a preliminary coarse conversion to generate a first code that approximates the input analog value. Based on this first code, the system preliminarily determines which groups of capacitors to activate and generates a second code for refinement. This preliminary action reduces the impact of capacitor mismatch errors by establishing a foundation that guides subsequent precision adjustments.
2Measurement precision
If capacitor arrays with high precision are used, then linearity improves, but manufacturing difficulty and cost increase
Solution Approach 1:
Instead of using a single large capacitor array with tight matching requirements, the invention divides the capacitor array into multiple smaller groups. Each group can be manufactured with relaxed precision tolerances, yet when selectively combined based on the first code, they achieve the equivalent precision of a much larger, tightly-matched capacitor array. This segmentation makes manufacturing significantly easier while maintaining high conversion accuracy.
Solution Approach 2:
The invention changes the operational parameters of the capacitor array by selectively activating different groups of capacitors based on the first code. Rather than relying on all capacitors having identical precise values, the system dynamically adjusts which capacitors are engaged, effectively changing the active capacitance configuration to achieve the desired precision through combination rather than individual component precision.
3Measurement precision
If more capacitors are used to improve resolution, then measurement precision improves, but device area increases
Solution Approach 1:
The capacitor array is divided into multiple groups that can be selectively activated. Rather than requiring all capacitors to be simultaneously active to achieve high resolution, the system activates only the necessary groups based on the first code. This segmentation allows high-resolution conversion to be achieved with a compact capacitor array, as not all capacitors need to be present or active at once.
Solution Approach 2:
The invention adds a temporal dimension to the capacitor array operation by sequentially activating different groups of capacitors based on the first code. Instead of requiring all capacitors to be physically present in a large array, the system achieves high resolution by activating different subsets of capacitors at different times, effectively using time multiplexing to reduce the physical area required while maintaining high measurement precision.
Data Source
AI summary
Herein disclosed is an example analog-to-digital converter (ADC) and methods that may be performed by the ADC. The ADC may derive a first code that approximates a combination of an analog input value of the ADC and a dither value for the ADC sampled on a capacitor array. The ADC may further derive a second code to represent a residue of the combination with respect to the first code applied to the capacitor array. The ADC may combine the numerical value of the first code and the numerical value of the second code to produce a combined code applied to the capacitor array for deriving a digital output code. Combining the numerical value of the first code and the numerical value of the second code in the digital domain can provide for greater analog-to-digital (A/D) conversion linearity.


