ADC Collision Avoidance via Sample-and-Hold Decoupling

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Solution Overview

Problem

Existing Analog-to-Digital-Converter (ADC) systems face timing limitations and collision issues when multiple conversion requests occur simultaneously, leading to inefficient sampling and potential errors due to internal timing dependencies between the sample and hold stage and the ADC conversion process.

Innovation Solution

A method and device that independently control the timing of the sample and hold stage and the ADC conversion, where the sample and hold module samples an analog input only if no collision is detected and if predefined sampling criteria are met, ensuring valid data before requesting conversion, thereby decoupling the sampling and conversion timing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple conversion requests are handled simultaneously by the ADC, then productivity is improved, but collision occurs leading to timing errors and reduced reliability

Engineering Contradiction:
Improveconversion throughputVSAvoidconversion accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The sample and hold stage performs preliminary sampling and holding of the analog input signal before the ADC conversion is initiated. This ensures that the signal is captured and stabilized in advance, allowing multiple sampling operations to be prepared simultaneously without causing collision during the actual conversion process, thus improving productivity while maintaining reliability

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The conversion process is segmented into distinct stages: sampling by the sample and hold circuit, holding the sampled value, and then ADC conversion. This segmentation allows the sampling phase to be independent and parallelizable, enabling multiple channels to be sampled simultaneously without interfering with each other's conversion, thereby resolving the contradiction between handling multiple requests and avoiding collision

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If the ADC conversion timing is strictly controlled, then measurement precision is improved, but the overall timing of the system is limited by the conversion duration

Engineering Contradiction:
Improveconversion accuracyVSAvoidsystem timing efficiency
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The sample and hold circuit performs preliminary sampling and stabilization of the analog signal before the ADC conversion begins. This preliminary action ensures that the signal is ready and stable for high-precision conversion without requiring the entire system to wait for the full conversion duration, as sampling is completed in advance

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

While the ADC is performing conversion on one channel, the sample and hold circuit continues to sample and hold signals from other channels in parallel. This continuity of useful action ensures that measurement precision is maintained for the current conversion while other channels are being prepared, reducing overall system timing loss and improving time efficiency

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS10181859B2Device and method for requesting an analog-to-digital conversion
Publication Date: 2019.01.15 INFINEON TECHNOLOGIES AG
  • US10181859B2 patent drawing
  • US10181859B2 patent drawing
  • US10181859B2 patent drawing

AI summary

An Analog-to-Digital-Conversion control system includes a first sample and hold circuit configured to provide a first sampled output to be converted by an Analog-to-Digital-Converter, which comprises a first sampling control circuit configured to receive a first trigger information to trigger sampling of a first analog input and to receive a first collision detection information from the Analog-to-Digital-Converter to detect a collision, a first sample and hold stage coupled to the first sampling control circuit and configured to sample the first analog input, only if no collision has been detected by the first sampling control circuit, wherein the first sampling control circuit is further configured to check predefined first sampling criteria and to output a first conversion request to the Analog-to-Digital-Converter, only if the predefined first sampling criteria are fulfilled.