Analog-to-Digital Converter With Common-Mode Voltage Generation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing analog-to-digital converters face challenges in operating with high input voltages, particularly in converting large voltage differences between input terminals effectively.
Innovation Solution
A measurement arrangement comprising an analog-to-digital converter with a high voltage domain for sampling capacitors and switches, and a low voltage domain for clock generators, utilizing a resistive voltage divider to generate the common mode voltage, allowing for high-side and low-side common mode input current/resistive sensing with direct digital conversion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If conventional analog-to-digital converters are used with high input voltages, then the converter can handle high voltage levels, but the absolute voltage values at integrator inputs become too large causing conversion errors
Solution Approach 1:
The patent divides the voltage conversion process into multiple stages using a multi-integrator architecture. The first integrator processes the high-voltage differential signal and outputs to a second integrator that further processes the signal. This segmentation allows the high input voltage to be handled in steps, preventing any single integrator from receiving excessively large voltage values that would cause conversion errors.
Solution Approach 2:
The patent introduces common-mode voltage terminals as intermediary reference points. By coupling the differential input signals to these common-mode terminals through controlled switches, the system creates intermediate reference levels that mediate between the high input voltage and the integrator inputs. This intermediary mechanism allows high voltage handling while maintaining appropriate voltage levels at the integrator stages.
2Adaptability or versatility
If high input voltages are applied to the converter, then the converter can measure high voltage signals, but the circuit complexity increases due to additional switches and domain separation
Solution Approach 1:
The patent introduces a voltage domain dimension by separating the circuit into high-voltage domain components (sampling capacitors, input switches) and low-voltage domain components (clock generators, integrators). This dimensional separation allows the system to handle high input voltages while keeping the core processing circuitry in a lower, safer voltage domain, thereby managing complexity through spatial-voltage separation.
Solution Approach 2:
The common-mode terminals serve multiple functions: they act as reference voltage points for the differential inputs, provide coupling paths for the switching network, and establish voltage level references for the integrators. This multi-functionality reduces the need for separate dedicated components, thereby managing circuit complexity while achieving high voltage measurement capability.
3Measurement precision
If multiple switches are used to couple input terminals to sampling capacitors, then the converter can properly sample differential signals, but the switching control complexity increases
Solution Approach 1:
The patent employs periodic switching controlled by clock signals to manage the multiple switches. The switches are activated in a periodic sequence that corresponds to the sampling phases, allowing accurate differential signal capture while using simple periodic clock control rather than complex individual switch control logic. This periodic action synchronizes the switching network to the sampling requirements.
Solution Approach 2:
The patent combines the control of multiple switches through a unified switching network architecture that responds to common clock signals. Rather than controlling each switch independently with separate logic, the switches are merged into a coordinated system where a single clock generator or synchronized clock sources control the entire switching network, thereby reducing control complexity while maintaining sampling accuracy.
Data Source
Figure 1A~1B
Figure 1C
Figure 1D
AI summary
An analog-to-digital converter (10) comprises a first and a second sampling capacitor (24, 25), a first integrator (26), a first and a second input switch (31, 32) coupling a first input terminal (11) and a common mode terminal (39) to a first electrode of the first sampling capacitor (24), a third and a fourth input switch (33, 34) coupling a second input terminal (12) and the common mode terminal (39) to a first electrode of the second sampling capacitor (25), a fifth and a sixth input switch (35, 36) coupling a second electrode of the first sampling capacitor (24) to an amplifier common mode terminal (40) and the first integrator input (27), and a seventh and an eighth input switch (37, 38) coupling a second electrode of the second sampling capacitor (25) to the amplifier common mode terminal (40) and the second integrator input (28).