Capacitive Feedback Comparator Circuit for Faster ADC Decisions
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Solution Overview
Problem
Comparator circuits in ADCs can produce indefinite comparison judgment outputs due to threshold voltage offsets in inverters, leading to dampened responses and slow comparison operations.
Innovation Solution
A comparator circuit configuration with multiple inverters, capacitors, and switches is implemented, where the zeroth to second inverters include PMOS and NMOS transistors with short-circuited gates, and power supply switches are used to manage the supply voltage and ground potential, ensuring node voltages are maintained near ideal threshold voltages during sampling and comparison, preventing indefinite outputs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a simple comparator circuit with a single inverter is used, then the device complexity is low, but the comparison judgment output becomes indefinite due to threshold voltage offset
Solution Approach 1:
The comparator circuit is segmented into multiple inverters (zeroth inverter, first inverter, second inverter) with distinct functions. The zeroth inverter performs the primary comparison, while the first and second inverters form a feedback loop that stabilizes the output and prevents indefinite judgment states, thereby improving reliability without excessive complexity increase
Solution Approach 2:
Capacitors are introduced as intermediary elements between the inverters. The zeroth capacitor stores the comparison result, while the first capacitor provides feedback to stabilize the first inverter's input, acting as a mediator that prevents the propagation of indefinite output states through the circuit
2Device complexity
If threshold voltage offset is present in the inverter, then the device simplicity is maintained, but the response speed becomes slow due to dampened comparison judgment
Solution Approach 1:
A feedback mechanism is implemented where the output of the second inverter is fed back to the input of the first inverter through the first capacitor. This feedback loop amplifies the comparison signal and accelerates the convergence to a definite output state, thereby improving response speed while maintaining the simplicity of the inverter configuration
Solution Approach 2:
The circuit transitions from a static single-inverter configuration to a dynamic multi-inverter system with capacitive feedback. The dynamic interaction between the inverters and capacitors creates a self-accelerating comparison process that overcomes the dampening effect of threshold voltage offset, enabling faster comparison operations
Data Source
AI summary
A comparator circuit includes a zeroth capacitor having a first terminal fed with an input voltage, a zeroth inverter having an input terminal connected to a second terminal of the zeroth capacitor at a zeroth node, a first capacitor having a first terminal connected to the output terminal of the zeroth inverter at a first node, a first inverter having an input terminal connected to a second terminal of the first capacitor at a second node, a second inverter having an input terminal connected to the output terminal of the first inverter at a third node, a zeroth switch switching conduction between the zeroth and first nodes, a first switch switching conduction between the second and third nodes, a second switch switching conduction between the first and third nodes, and a third switch switching conduction between the third node and the output terminal of the second inverter.