Dual-Path Comparator Layout for ADC Kickback Suppression
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Solution Overview
Problem
In successive-approximation-register analog-to-digital converters, significant signal level changes in differential input signal pairs can cause kickback current, leading to fluctuations in the signal level of the difference signal, resulting in deviations in the output signal and impaired ADC operation.
Innovation Solution
A comparator design with two differential input signal pairs, where the connection destinations of the signals are reversed between the first and second comparison circuits, and both circuits have a common circuit configuration and electrical characteristics, effectively suppressing kickback current fluctuations by equalizing voltage fluctuations across the gates of transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single comparison circuit is used to compare differential input signal pairs, then the device complexity is reduced, but kickback current causes voltage fluctuations in the difference signal leading to output deviation
Solution Approach 1:
The comparator is divided into two separate comparison circuits (first comparison circuit and second comparison circuit) that independently process the differential input signal pairs. Each circuit handles one comparison operation, preventing kickback current from affecting a single shared circuit and causing output deviations.
Solution Approach 2:
Both comparison circuits are integrated within the same comparator device with shared power supply connections and common circuit configuration. The circuits work simultaneously to compare different differential signal pairs, achieving high precision output without requiring completely separate devices.
2Adaptability or versatility
If the signal level of differential input signal pairs greatly changes, then the ADC can handle a wider dynamic range, but kickback current flows through the transistor gate causing signal level fluctuation
Solution Approach 1:
The comparator processes different differential signal pairs through separate comparison circuits, isolating the kickback current effects to individual circuits. This segmentation allows the system to handle varying signal levels without one circuit's kickback affecting the overall output stability.
Solution Approach 2:
The comparator accepts differential input signal pairs with greatly varying signal levels by using separate comparison circuits that can independently accommodate different voltage ranges. Each circuit is designed to handle its specific signal pair without interference from kickback current in the other circuit.
3Measurement precision
If two differential input signal pairs are processed simultaneously, then the ADC conversion accuracy is improved, but the circuit configuration becomes more complex
Solution Approach 1:
Two comparison circuits are merged into a single comparator device with shared power supply connections, common substrate, and integrated layout. This merging achieves high ADC conversion accuracy through simultaneous dual-pair comparison while avoiding the complexity of completely separate comparator devices.
Solution Approach 2:
Both comparison circuits are designed with identical circuit configurations and electrical characteristics, ensuring symmetric performance. This homogeneity simplifies the overall design by using repeated modular units rather than asymmetric complex circuits.
Data Source
AI summary
A kickback current is suppressed so as not to generate a deviation in a signal that outputs a comparison result.A comparator includes a first input terminal and a second input terminal to which a first differential input signal pair is input, a third input terminal and a fourth input terminal to which a second differential input signal pair is input, a first comparison circuit that outputs a signal corresponding to a difference signal of the first differential input signal pair generated by connecting the first input terminal to a positive side and connecting the second input terminal to a negative side and a difference signal of the second differential input signal pair generated by connecting the third input terminal to a positive side and connecting the fourth input terminal to a negative side, and a second comparison circuit that outputs a signal corresponding to a difference signal of the first differential input signal pair generated by connecting the first input terminal to a negative side and connecting the second input terminal to a positive side, and a difference signal of the second differential input signal pair generated by connecting the third input terminal to a positive side and connecting the fourth input terminal to a negative side.


