Comparator Circuit for Fast ADC Decisions With Post-Inversion Current Limiting
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Solution Overview
Problem
In solid-state imaging devices, comparators in pixel columns face challenges in achieving high determination speed while maintaining low power consumption due to limited circuit accommodation area, leading to increased power consumption and reduced performance.
Innovation Solution
Incorporating a comparator with a comparison unit, a positive feedback circuit to enhance transition speed, and a current limiting unit to control current after inversion, along with a storage unit for code input signals, to optimize the AD conversion process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the comparator is designed to increase determination speed, then the determination speed is improved, but power consumption increases
Solution Approach 1:
The comparator circuit dynamically adjusts its operating characteristics by using a current limiting unit that activates after inversion to control current flow. This dynamic control allows the circuit to achieve high determination speed during the critical transition phase while limiting power consumption during the stable state, resolving the contradiction between speed and power usage.
Solution Approach 2:
The comparator operates in periodic phases: a high-current phase during inversion for fast determination, followed by a current-limited phase for power savings. This periodic action pattern allows the circuit to achieve fast determination speed when needed while maintaining low power consumption during the majority of the operation cycle.
2Speed
If the comparator is designed to increase determination speed, then the determination speed is improved, but the circuit accommodation area increases
Solution Approach 1:
The positive feedback circuit is strategically placed to provide localized speed enhancement only at the critical inversion point, rather than throughout the entire comparator circuit. This localized approach achieves high determination speed while minimizing the overall circuit area required.
Solution Approach 2:
The current limiting unit is integrated into the comparator circuit structure, merging multiple functions (comparison, feedback, and current control) into a compact arrangement. This integration achieves fast determination speed without proportionally increasing the circuit accommodation area.
3Speed
If the current flowing in the comparison unit is increased to improve determination speed, then the determination speed is improved, but power consumption increases
Solution Approach 1:
The positive feedback circuit prepares the comparator for fast inversion by pre-charging or pre-positioning circuit elements before the actual comparison completes. This preliminary action enables rapid transition when inversion occurs, achieving high determination speed without requiring sustained high current flow that would increase power consumption.
Solution Approach 2:
The comparator uses a brief high-current pulse during the critical inversion moment to rapidly transition the output state, then immediately transitions to a current-limited mode. This 'rushing through' the critical transition phase approach achieves fast determination speed while minimizing the duration and total energy of high current flow.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces power consumption while increasing the determination speed of the comparator, effectively addressing the limitations of existing technologies.
Implementation Method 1
a positive feedback circuit that increases the speed of transition at the time when the comparison result signal is inverted
Implementation Method 2
a current limiting unit that limits the current flowing in the comparison unit after the inversion of the comparison result signal
Data Source
AI summary
The present disclosure relates to a comparator, an AD converter, a solid-state imaging device, an electronic apparatus, and a comparator control method that can reduce power consumption while increasing the determination speed of the comparator.The comparator includes a comparison unit, a positive feedback circuit, and a current limiting unit. The comparison unit compares the voltage of an input signal and the voltage of a reference signal, and outputs a comparison result signal. The positive feedback circuit increases the transition speed at the time when the comparison result signal is inverted. The current limiting unit limits the current flowing in the comparison unit after the inversion of the comparison result signal. The present disclosure can be applied to comparators, for example.