ADC Continuous Sampling Circuit for Low-Current Conversion

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Solution Overview

Problem

Conventional analog-to-digital conversion methods result in costly components, increased power consumption, and higher system complexity due to the need for larger capacitors to avoid gain errors and dielectric absorption effects, especially at smaller technology nodes, which affects the performance of ADCs.

Innovation Solution

The proposed solution involves a continuous sampling approach where the sampling switch remains closed until a trigger signal is received, allowing the sampling capacitor to continuously charge and reducing the need for external capacitors, thereby minimizing dielectric absorption effects and input current, and allowing for longer sampling times without hold and conversion errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a short sampling time is used to enable fast results, then conversion speed is improved, but input current increases (I=dq/dt)

Engineering Contradiction:
Improveconversion speedVSAvoidinput current
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The sampling capacitor continuously charges during a pre-sampling period before the actual conversion is triggered. This preliminary charging action stores energy in advance, so when conversion is needed, the capacitor can quickly discharge without requiring high instantaneous current, thus resolving the contradiction between fast conversion speed and low input current.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If external blocking capacitors are used to avoid gain errors, then conversion accuracy is improved, but component cost and PCB space increase

Engineering Contradiction:
Improveconversion accuracyVSAvoidcomponent count
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts the blocking capacitor function from the external component domain and integrates it into the internal sampling capacitor of the ADC. By making the sampling capacitor continuously chargeable and eliminating the need for separate external blocking capacitors, the invention maintains conversion accuracy while reducing component count and PCB space.

Inventive Principle:
Principle #2Taking out (Extraction)

3Speed

If smaller technology nodes are used to achieve faster performance, then processing speed is improved, but dielectric absorption effects increase affecting ADC performance

Engineering Contradiction:
Improveprocessing speedVSAvoidADC performance
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The sampling capacitor maintains continuous charging action rather than periodic charging and discharging. This continuous useful action prevents the capacitor from fully discharging, minimizing dielectric absorption effects that become problematic at smaller technology nodes, thus maintaining ADC performance while benefiting from faster processing speeds.

Inventive Principle:
Principle #20Continuity of useful action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces the need for external capacitors, decreases input current, and minimizes dielectric absorption effects, leading to improved ADC performance and reduced system costs while maintaining accurate conversion results.

Implementation Method 1

the sampling capacitor to continuously charge and reducing the need for external capacitors, thereby minimizing dielectric absorption effects

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS11784657B2Devices and systems for analog-to-digital conversion
Publication Date: 2023.10.10 INFINEON TECHNOLOGIES AG
  • US11784657B2 patent drawing
  • US11784657B2 patent drawing
  • US11784657B2 patent drawing

AI summary

An analog-to-digital device includes a sampling circuit for sampling an input signal. The sampling circuit stops sampling in response to obtaining a trigger signal. The analog-to-digital device includes an analog-to-digital converter circuit which includes an analog to digital converter (ADC) for converting a sampled input provided from the sampling circuit to digital output.