ADC Correction Signal Circuit for Delay-Based Linearity Calibration
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Solution Overview
Problem
Existing A/D converters have complex input/output characteristics that are non-linear, requiring multiple reference voltages for conversion equation setup, making it difficult to correct for linearity without actual A/D conversions.
Innovation Solution
A correction signal generator that uses multiple pulse delay circuits and stage number detection circuits to generate a correction signal, allowing for the correction of digital values after A/D conversion to achieve linear input/output characteristics without performing conversions for multiple reference voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple reference voltages are used for conversion equation setup, then manufacturing precision of A/D converter is improved, but device complexity increases
Solution Approach 1:
The patent creates a simplified copy model of the A/D converter's delay circuit that replicates the non-linear delay characteristics without requiring actual A/D conversion. This copy model uses the same delay units and pulse circulation mechanism to generate correction data, avoiding the complexity of multiple reference voltage conversions while preserving the essential non-linear behavior for correction purposes
Solution Approach 2:
The patent extracts only the necessary delay characteristic data from the A/D converter system by using a separate correction data generation circuit that mimics the delay behavior. This extraction approach separates the correction data generation from the actual A/D conversion process, eliminating the need for complex multi-reference-voltage procedures while obtaining the required non-linear delay information
2Manufacturing precision
If actual A/D conversions are performed for multiple reference voltages, then manufacturing precision is improved, but loss of time increases
Solution Approach 1:
The patent performs preliminary action by pre-generating correction data using a dedicated correction data generation circuit that operates independently and in parallel with the main A/D conversion. This preliminary correction data is stored and readily available when needed, eliminating the time-consuming process of performing actual A/D conversions for multiple reference voltages during setup or calibration
3Manufacturing precision
If complex conversion equations are used for linearity correction, then manufacturing precision is improved, but ease of operation deteriorates
Solution Approach 1:
The correction data generation circuit performs self-service by automatically generating the necessary correction data using the same delay mechanism inherent in the A/D converter. The circuit autonomously creates correction values based on the non-linear delay characteristics without requiring external complex calculations or manual setup, making the operation simple while maintaining high correction accuracy
Solution Approach 2:
The delay units in the correction data generation circuit serve multiple functions: they are used both for the actual A/D conversion process and for generating correction data. This multi-functionality eliminates the need for separate complex correction mechanisms, allowing the same hardware to perform both conversion and correction data generation, thereby simplifying operation while maintaining precision
Data Source
AI summary
A correction signal generator generates a correction signal that corrects a digital signal obtained from an analog input voltage. The correction signal generator has a correction signal output circuit that holds the number of transit stages of delay units detected by a first stage count detection circuit and a third stage count detection circuit at the timing corresponding to the difference in the number of stages between the number of transit stages of delay units detected by the first stage count detection circuit and the number of transit stages of delay units detected by a second stage count detection circuit, and outputs the difference between the number of stages from the first stage count detection circuit and the number of stages from the third stage count detection circuit, which were held, as the correction signal.