Time-Interleaved ADC Correction Circuits for Flicker Noise Reduction
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Solution Overview
Problem
Existing analog-to-digital conversion technologies suffer from noise issues, such as flicker noise, which impair signal quality due to electrical components like comparators and buffers, leading to a need for improved conversion methods.
Innovation Solution
The use of multiple ADC cores and a secondary ADC core with correction circuits that align and modify digital data to correct noise without removing parts of the input signal, employing a time-interleaved configuration and adaptive filtering to reduce noise while maintaining signal integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If electrical components such as comparators and buffers are used in analog-to-digital conversion, then the conversion function is achieved, but noise such as flicker noise is introduced which impairs signal quality
Solution Approach 1:
The patent divides the analog-to-digital conversion function into multiple parallel ADC cores instead of using a single conversion path with noisy electrical components. Each core processes a portion of the signal, and their outputs are combined, thereby distributing and reducing the noise impact while maintaining conversion functionality.
Solution Approach 2:
The patent combines the outputs of multiple ADC cores through summation to produce the final digital output. This merging approach allows the system to achieve the desired conversion function while canceling out noise through coherent signal addition, thereby improving signal quality without relying on noisy electrical components like comparators and buffers.
2Reliability
If multiple ADC cores are used in parallel configuration, then noise is reduced through signal combining, but device complexity increases
Solution Approach 1:
The patent designs multiple ADC cores with identical or similar structures that can be easily replicated and integrated. Each core performs the same conversion function, allowing for standardized manufacturing and reducing the overall complexity despite the increased number of components. The uniform design enables efficient resource utilization and simplifies the integration process.
Data Source
AI summary
Provided is an apparatus for analog-to-digital conversion. The apparatus comprises a plurality of first analog-to-digital converter, ADC, cores configured to receive an analog input signal and to generate respective first digital data based on the analog input signal. Further, the apparatus comprises a second ADC core configured to receive the analog input signal and to generate second digital data based on the analog input signal. In addition, the apparatus comprises a plurality of correction circuits each coupled to a respective one of the plurality of first ADC cores, wherein the plurality of correction circuits is configured to receive the second digital data and to modify the respective first digital data based on the second digital data.