Image Sensor ADC Counter Layout for Lower Power Readout
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Solution Overview
Problem
The increasing number of pixels in image sensors leads to higher power consumption, necessitating a low-power driving capability, especially in mobile environments, which existing analog-to-digital converters (ADCs) fail to address effectively.
Innovation Solution
The ADC and image sensor design includes a counter circuit with a first counter circuit that latches a counting code to generate least significant bit signals and a second counter circuit that generates most significant bit signals sequentially, with the second counter circuit arranged between latch circuits to reduce power consumption by minimizing signal transmission distance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of pixels in the image sensor is increased, then the image quality and resolution are improved, but the power consumption increases
Solution Approach 1:
The counter circuit is divided into two independent parts: a first counter circuit for generating least significant bits and a second counter circuit for generating most significant bits. This segmentation allows each sub-circuit to operate independently with optimized power management, reducing the total power consumption while maintaining the ability to handle high-resolution pixel data from increased pixel counts.
2Loss of energy
If the second counter circuit is arranged between the first latch circuit and the addition circuit, then the signal transmission distance is reduced, but the device layout complexity increases
Solution Approach 1:
The patent utilizes three-dimensional integration by arranging the second counter circuit between the first latch circuit and addition circuit in a vertical or layered configuration rather than a simple linear arrangement. This spatial reorganization reduces signal transmission distance and parasitic effects while managing the increased layout complexity through advanced packaging and interconnection techniques.
Data Source
AI summary
An image sensor includes a counter circuit that outputs a count value corresponding to a magnitude of a pixel signal. The counter circuit includes a first counter circuit that latches a counting code to generate at least one least significant bit signal of a count value; and a second counter circuit that generates most significant bit signals sequentially toggling in response to one of the at least one least significant bit signal or an inversion signal of the one of the at least one least significant bit signal. The first counter circuit includes a plurality of latch circuits and an addition circuit. The second counter circuit is arranged between the plurality of latch circuits along a first virtual line connecting a comparator and the plurality of latch circuits.