ADC Reference Network With Current Valve for Stable Low Impedance
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Solution Overview
Problem
Pipelined analog-to-digital converter systems face challenges in generating accurate low-impedance reference signals, which are critical for high-speed and high-resolution signal processing, as errors in these signals directly impact the final digital code quality and are susceptible to temperature, process, and supply variations.
Innovation Solution
A reference network using a complementary common-drain output stage with an output current valve and a controller to maintain a constant output current, while allowing selective alteration of the reference voltage span, and incorporating a bandgap reference for temperature independence, and capacitors to reduce noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional reference signal generation is used in pipelined ADC systems, then the system can achieve high sample rates, but the reference signals suffer from temperature, process, and supply variations that degrade accuracy
Solution Approach 1:
A buffer stage is introduced as an intermediary between the reference signal source and the switched-capacitor circuits. This buffer stage isolates the reference signals from load variations and provides low output impedance, thereby maintaining signal accuracy despite temperature and supply variations in the rest of the system.
Solution Approach 2:
The reference signal generation circuitry is designed to maintain constant output impedance across varying temperature and supply conditions. By controlling the impedance parameter to remain stable, the system achieves accurate reference signals even when other parameters like temperature and supply voltage fluctuate.
2Speed
If high-speed reference signal generation is implemented, then the converter speed is improved, but power consumption increases
Solution Approach 1:
The reference signal generation circuitry uses dynamic clocking and selective activation of circuit components based on the conversion stage requirements. This dynamic operation allows high-speed signal generation only when needed, while reducing power consumption during idle or low-demand periods.
Solution Approach 2:
The reference signals are generated periodically synchronized with the conversion clock, rather than continuously. This periodic generation maintains the required high speed for accurate conversion while significantly reducing average power consumption compared to continuous operation.
3Measurement precision
If low output impedance is provided for reference signals, then the signal accuracy is improved, but the circuit complexity increases
Solution Approach 1:
The reference network is segmented into multiple independent buffer stages, each providing low output impedance to specific reference signal lines. This segmentation allows the low-impedance function to be distributed across simple, modular buffer circuits rather than requiring a single complex low-impedance source.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides fast, power-efficient, and accurate low-impedance reference signals that are independent of temperature and supply variations, enhancing the overall efficiency and accuracy of the converter system by maintaining a constant output current and stabilizing reference voltages.
Implementation Method 1
incorporating a bandgap reference for temperature independence
Implementation Method 2
incorporating a bandgap reference for temperature independence, and capacitors to reduce noise
Data Source
AI summary
Reference network embodiments are provided for use in pipelined signal converter systems. The network embodiments are fast and power efficient and they generate low-impedance reference signals through the use of a complimentary common-drain output stage, an output current valve inserted between transistors of the output stage, and a controller. The controller is configured to provide gate voltages to the output current valve to thereby establish a substantially-constant output current. The controller is further configured to provide gate voltages to the output stage to establish top and bottom reference voltages about the output current valve that are spaced from a common-mode voltage. This reference structure maintains a constant output current as the span between the top and bottom reference voltages is selectively altered. In different embodiments, transistors of the output current valve are arranged in a drain-to-source-coupled configuration and in a source-coupled configuration.


