ADC Calibration Circuit Using Dual Digital Code Correction
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Solution Overview
Problem
Conventional ADC calibration methods require time-consuming comparator offset calibration and are sensitive to process, voltage, and temperature variations, leading to poor linearity and accuracy issues in successive approximation ADCs.
Innovation Solution
A method and circuit for calibrating ADCs that involves resetting comparator voltages, changing capacitor terminal voltages in two capacitor groups, and generating digital codes to correct the ADC output, eliminating the need for prior comparator offset calibration and allowing for faster calibration without calibrating capacitance values.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional calibration methods are used to calibrate comparator offset beforehand, then calibration accuracy can be achieved, but calibration time increases and the process becomes more complex
Solution Approach 1:
The patent extracts and eliminates the comparator offset calibration step from the overall ADC calibration process. By using a differential calibration approach that simultaneously calibrates both capacitor arrays without requiring separate comparator offset calibration, the method removes this time-consuming preliminary step while maintaining calibration accuracy through the differential measurement technique
Solution Approach 2:
The patent performs preliminary setup by configuring the capacitor arrays in specific test modes before the actual calibration measurement. The capacitor arrays are pre-configured with known test patterns and the calibration circuit is prepared in advance, allowing the calibration to proceed directly to the measurement phase without requiring separate comparator offset calibration steps
2Reliability
If conventional calibration methods are used, then some level of calibration can be achieved, but the ADC performance degrades under PVT variations and residual comparator offset
Solution Approach 1:
The patent implements a feedback mechanism where the calibration circuit measures the actual differential voltage between the two capacitor arrays and uses this measurement to adjust the capacitance values. The digital-to-analog converter converts digital calibration codes to analog voltages, which are fed back to the capacitor arrays iteratively until the differential voltage matches the expected value, ensuring accurate calibration under various PVT conditions
Solution Approach 2:
The patent changes the operating parameters of the capacitor arrays during calibration by adjusting the capacitance values through switched capacitor configurations. By varying the effective capacitance values in response to measured differential voltages, the system adapts to PVT variations and achieves accurate calibration across different process, voltage, and temperature conditions
3Ease of manufacture
If bridge capacitor with non-integer multiple capacitance value is used, then the bridge DAC structure can be implemented, but manufacturing precision decreases due to fabrication difficulty and parasitic capacitors
Solution Approach 1:
The patent enables the capacitor arrays to self-calibrate by measuring their own differential voltage and automatically adjusting their capacitance values through the calibration circuit. This self-service mechanism eliminates the need for high-precision manual fabrication of bridge capacitors with non-integer multiples, as the system compensates for manufacturing variations through automated calibration
Solution Approach 2:
The patent replaces the mechanical/fabrication-based precision requirement with an electronic calibration system. Instead of relying on precise physical fabrication of bridge capacitors, the system uses digital-to-analog conversion and electronic feedback to achieve the required precision, substituting electronic control for mechanical fabrication precision
Data Source
AI summary
The invention discloses a calibration circuit and a calibration method for an analog-to-digital converter (ADC). The calibration method of the ADC includes the following steps: (a) resetting the voltage at the first input of the comparator and the voltage at the second input of the comparator; (b) changing a terminal voltage of at least one capacitor in the first capacitor group; (c) the ADC generating a first digital code; (d) after the first digital code is obtained, resetting the voltage at the first input of the comparator and the voltage at the second input of the comparator; (e) changing a terminal voltage of at least one capacitor in the third capacitor group; and (f) the ADC generating a second digital code. The first digital code and the second digital code are used to correct the output of the ADC.