Analog-Digital Converter with Dual-Comparator Tree Structure
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Solution Overview
Problem
Existing analog-digital conversion methods in solid-state image sensors either significantly increase processing time or circuit area when enhancing resolution, often degrading image quality due to the need for additional comparisons or capacitors, which can lead to noise in images.
Innovation Solution
The implementation of a dual-comparator system with a voltage follower that adjusts reference voltages and switches between them to determine digital data bits efficiently, reducing the need for additional capacitors and minimizing processing time and circuit area while maintaining image quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of bits of digital signal is increased by slope integration or ramp signal comparison method, then the resolution of AD conversion is improved, but the time necessary for counting process is extremely increased
Solution Approach 1:
The patent divides the reference voltage comparison process into multiple segments using a tree structure. Instead of sequentially comparing against all possible reference voltages (which would require 2^N comparisons for N bits), the method segments the comparison into hierarchical levels, reducing the total number of comparisons needed to determine each bit of the digital output signal.
Solution Approach 2:
The patent introduces a temporal dimension to the comparison process by using a timing signal that progresses through multiple phases. Each phase corresponds to a different level in the tree structure, allowing parallel evaluation of multiple comparison conditions across different time slots, thereby reducing overall processing time.
2Measurement precision
If the number of bits of digital signal is increased by successive approximation method, then the resolution of AD conversion is improved, but the circuit area is increased due to addition of large capacitance capacitors
Solution Approach 1:
The patent merges the functions of multiple capacitors into a single capacitor by using the timing signal to selectively connect different nodes to the same capacitor. This allows the circuit to achieve the functionality of multiple capacitors with different capacitance values while physically using only one capacitor, thereby reducing circuit area.
Solution Approach 2:
The patent makes the capacitor configuration dynamic by using switches controlled by the timing signal to reconfigure the capacitor connections during different phases of the conversion process. This dynamic reconfiguration allows the same capacitor to serve multiple roles that would otherwise require multiple static capacitors, reducing the overall circuit area.
3Measurement precision
If the number of bits of digital signal is increased by successive approximation method, then the resolution of AD conversion is improved, but the image quality is degraded due to inaccurate capacitance ratios
Solution Approach 1:
The patent changes the control parameter from capacitance ratios to timing signal phases. Instead of relying on precise capacitance ratios between multiple capacitors, the method uses the phase timing of a single timing signal to control the switching of a single capacitor, thereby eliminating the reliability issues associated with maintaining accurate capacitance ratios while still achieving high-resolution conversion.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for increased resolution without substantial increases in processing time or circuit area, preventing image quality degradation and reducing noise, thereby enhancing the performance of solid-state image sensors.
Implementation Method 1
a pixel voltage corresponding to electric charge generated by the photoelectric conversion element
Data Source
AI summary
An analog-digital converter includes: a first comparator configured to make a comparison between a pixel voltage and a first reference voltage, the pixel voltage being a signal voltage outputted from a pixel including an photoelectric conversion element, the pixel voltage corresponding to electric charge generated by the photoelectric conversion element; a second comparator configured to make a comparison between the pixel voltage and a second reference voltage; and a voltage follower configured to connect an input terminal for the first reference voltage of the first comparator and an input terminal for the second reference voltage of the second comparator through a switch.